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| author | Fabien Poussin <fabien.poussin@gmail.com> | 2018-03-15 12:07:33 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-03-15 12:07:33 +0100 |
| commit | dabdfca04e5f470d1eb83f72f18269bd294031b6 (patch) | |
| tree | 369ab63741cac4ff7b45be2e871ecec078c52576 /os | |
| parent | f8fbfbd2486c95550c188653f390366664dffc3f (diff) | |
| parent | 6513490986e564fd944ec3e460eb5f91b5cd9c35 (diff) | |
| download | ChibiOS-Contrib-dabdfca04e5f470d1eb83f72f18269bd294031b6.tar.gz ChibiOS-Contrib-dabdfca04e5f470d1eb83f72f18269bd294031b6.tar.bz2 ChibiOS-Contrib-dabdfca04e5f470d1eb83f72f18269bd294031b6.zip | |
Merge pull request #148 from romainreignier/add_stm32L4
platform: add support for STM32L4 family
Diffstat (limited to 'os')
| -rw-r--r-- | os/hal/ports/STM32/STM32L4xx/platform.mk | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/os/hal/ports/STM32/STM32L4xx/platform.mk b/os/hal/ports/STM32/STM32L4xx/platform.mk new file mode 100644 index 0000000..b9bbfea --- /dev/null +++ b/os/hal/ports/STM32/STM32L4xx/platform.mk @@ -0,0 +1,21 @@ +include ${CHIBIOS}/os/hal/ports/STM32/STM32L4xx/platform.mk
+
+PLATFORMSRC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1/hal_crc_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1/hal_stm32_dma2d.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_nand_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1/hal_fsmc_sram.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1/hal_stm32_ltdc.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_eicu_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_timcap_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1/hal_qei_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1/hal_usbh_lld.c \
+ ${CHIBIOS_CONTRIB}/os/hal/src/hal_fsmc_sdram.c
+
+PLATFORMINC += ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/CRCv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/DMA2Dv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/FSMCv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/LTDCv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/TIMv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD/USBHv1 \
+ ${CHIBIOS_CONTRIB}/os/hal/ports/STM32/LLD
|