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| author | barthess <barthess@yandex.ru> | 2017-01-13 16:43:57 +0300 |
|---|---|---|
| committer | barthess <barthess@yandex.ru> | 2017-01-17 21:10:54 +0300 |
| commit | 88c55f1aaa3875184f43cb345831b2c776ae7d76 (patch) | |
| tree | 8248b47c18c24f2d3b9d58e6b8e8682250aeec5b /testhal/STM32/STM32F4xx/FSMC_NAND | |
| parent | d2aaea434a5bf7f6c289bf24483a9424d161b2a5 (diff) | |
| download | ChibiOS-Contrib-88c55f1aaa3875184f43cb345831b2c776ae7d76.tar.gz ChibiOS-Contrib-88c55f1aaa3875184f43cb345831b2c776ae7d76.tar.bz2 ChibiOS-Contrib-88c55f1aaa3875184f43cb345831b2c776ae7d76.zip | |
FSMC NAND improvements.
1) Implemented 16 bit bus width support
2) Added workaround errata in STM32
Diffstat (limited to 'testhal/STM32/STM32F4xx/FSMC_NAND')
| -rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_NAND/main.c | 7 | ||||
| -rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h | 1 |
2 files changed, 1 insertions, 7 deletions
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c index e75a937..73c9cb3 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c @@ -509,10 +509,8 @@ static void nand_test(bool use_badblock_map) { /* performance counters */ int32_t adc_ints = 0; - int32_t spi_ints = 0; int32_t uart_ints = 0; int32_t adc_idle_ints = 0; - int32_t spi_idle_ints = 0; int32_t uart_idle_ints = 0; uint32_t background_cnt = 0; systime_t T = 0; @@ -540,13 +538,11 @@ static void nand_test(bool use_badblock_map) { */ dma_storm_adc_start(); dma_storm_uart_start(); - dma_storm_spi_start(); T = chVTGetSystemTimeX(); general_test(&NAND, NAND_TEST_START_BLOCK, NAND_TEST_END_BLOCK, 1); T = chVTGetSystemTimeX() - T; adc_ints = dma_storm_adc_stop(); uart_ints = dma_storm_uart_stop(); - spi_ints = dma_storm_spi_stop(); chSysLock(); background_cnt = BackgroundThdCnt; BackgroundThdCnt = 0; @@ -557,11 +553,9 @@ static void nand_test(bool use_badblock_map) { */ dma_storm_adc_start(); dma_storm_uart_start(); - dma_storm_spi_start(); chThdSleep(T); adc_idle_ints = dma_storm_adc_stop(); uart_idle_ints = dma_storm_uart_stop(); - spi_idle_ints = dma_storm_spi_stop(); /* * ensure that NAND code have negligible impact on other subsystems @@ -569,7 +563,6 @@ static void nand_test(bool use_badblock_map) { osalDbgCheck(background_cnt > (BackgroundThdCnt / 4)); osalDbgCheck(abs(adc_ints - adc_idle_ints) < (adc_idle_ints / 20)); osalDbgCheck(abs(uart_ints - uart_idle_ints) < (uart_idle_ints / 20)); - osalDbgCheck(abs(spi_ints - spi_idle_ints) < (spi_idle_ints / 10)); /* * perform ECC calculation test diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h index dd72e66..be64b51 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h @@ -29,6 +29,7 @@ #define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_NAND_DMA_PRIORITY 0 #define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") +#define STM32_NAND_BUS_WIDTH 8 /* * FSMC SRAM driver system settings. |