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author | barthess <barthess@yandex.ru> | 2015-05-02 20:51:04 +0300 |
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committer | barthess <barthess@yandex.ru> | 2015-05-02 20:51:04 +0300 |
commit | c44092eb0f32b0e1903c99e3f734f3134f01b52c (patch) | |
tree | dffa3640b37bec0f9eb1dfb00936b21c80e86fe1 /testhal/STM32/STM32F4xx/FSMC_NAND | |
parent | 789b4e18b14ec5b8183978238575a75e6b056d5c (diff) | |
download | ChibiOS-Contrib-c44092eb0f32b0e1903c99e3f734f3134f01b52c.tar.gz ChibiOS-Contrib-c44092eb0f32b0e1903c99e3f734f3134f01b52c.tar.bz2 ChibiOS-Contrib-c44092eb0f32b0e1903c99e3f734f3134f01b52c.zip |
NAND code changed to use bitmap class
Diffstat (limited to 'testhal/STM32/STM32F4xx/FSMC_NAND')
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_NAND/Makefile | 3 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h | 2 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h | 8 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_NAND/main.c | 38 | ||||
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h | 2 |
5 files changed, 30 insertions, 23 deletions
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile index 5474ee7..a203a21 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/Makefile @@ -105,6 +105,7 @@ CSRC = $(STARTUPSRC) \ $(PLATFORMSRC) \ $(BOARDSRC) \ $(TESTSRC) \ + $(CHIBIOS)/community/os/various/bitmap.c \ dma_storm_adc.c \ dma_storm_spi.c \ dma_storm_uart.c \ @@ -139,7 +140,7 @@ ASMSRC = $(STARTUPASM) $(PORTASM) $(OSALASM) INCDIR = $(STARTUPINC) $(KERNINC) $(PORTINC) $(OSALINC) \ $(HALINC) $(PLATFORMINC) $(BOARDINC) $(TESTINC) \ - $(CHIBIOS)/os/various + $(CHIBIOS)/os/various $(CHIBIOS)/community/os/various # diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h index b983830..7bd9c15 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/chconf.h @@ -361,7 +361,7 @@ * * @note The default is @p FALSE. */ -#define CH_DBG_ENABLE_TRACE TRUE +#define CH_DBG_ENABLE_TRACE FALSE /** * @brief Debug option, stack checks. diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h index fd15a4e..efe259a 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/halconf_community.h @@ -50,14 +50,6 @@ #define NAND_USE_MUTUAL_EXCLUSION TRUE
#endif
-/**
- * @brief Enables internal driver map for bad blocks.
- * @note Disabling this option saves both code and data space.
- */
-#if !defined(NAND_USE_BAD_MAP) || defined(__DOXYGEN__)
-#define NAND_USE_BAD_MAP TRUE
-#endif
-
/*===========================================================================*/
/* 1-wire driver related settings. */
/*===========================================================================*/
diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c index bdc72e0..7df235e 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/main.c +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/main.c @@ -44,6 +44,8 @@ #include "ch.h" #include "hal.h" +#include "bitmap.h" + #include "dma_storm.h" #include "string.h" #include "stdlib.h" @@ -54,6 +56,8 @@ ****************************************************************************** */ +#define USE_BAD_MAP TRUE + #define USE_KILL_BLOCK_TEST FALSE #define FSMCNAND_TIME_SET ((uint32_t) 2) //(8nS) @@ -69,7 +73,7 @@ #define NAND_ROW_WRITE_CYCLES 3 #define NAND_COL_WRITE_CYCLES 2 -#define NANF_TEST_START_BLOCK 1200 +#define NAND_TEST_START_BLOCK 1200 #define NAND_TEST_END_BLOCK 1220 #if USE_KILL_BLOCK_TEST @@ -120,23 +124,26 @@ static time_measurement_t tmu_write_data; static time_measurement_t tmu_write_spare; static time_measurement_t tmu_read_data; static time_measurement_t tmu_read_spare; - -#if NAND_USE_BAD_MAP -static uint32_t badblock_map[NAND_BLOCKS_COUNT / 32]; +static time_measurement_t tmu_driver_start; + +#if USE_BAD_MAP +#define BAD_MAP_LEN (NAND_BLOCKS_COUNT / (sizeof(bitmap_word_t) * 8)) +static bitmap_word_t badblock_map_array[BAD_MAP_LEN]; +static bitmap_t badblock_map = { + badblock_map_array, + BAD_MAP_LEN +}; #endif /* * */ static const NANDConfig nandcfg = { - &FSMCD1, + //&FSMCD1, NAND_BLOCKS_COUNT, NAND_PAGE_DATA_SIZE, NAND_PAGE_SPARE_SIZE, NAND_PAGES_PER_BLOCK, -#if NAND_USE_BAD_MAP - badblock_map, -#endif NAND_ROW_WRITE_CYCLES, NAND_COL_WRITE_CYCLES, /* stm32 specific fields */ @@ -567,7 +574,14 @@ int main(void) { #if STM32_NAND_USE_EXT_INT extStart(&EXTD1, &extcfg); #endif - nandStart(&NAND, &nandcfg); + chTMObjectInit(&tmu_driver_start); + chTMStartMeasurementX(&tmu_driver_start); +#if USE_BAD_MAP + nandStart(&NAND, &nandcfg, &badblock_map); +#else + nandStart(&NAND, &nandcfg, NULL); +#endif + chTMStopMeasurementX(&tmu_driver_start); chThdSleepMilliseconds(4000); @@ -586,7 +600,7 @@ int main(void) { dma_storm_uart_start(); dma_storm_spi_start(); T = chVTGetSystemTimeX(); - general_test(&NAND, NANF_TEST_START_BLOCK, NAND_TEST_END_BLOCK, 1); + general_test(&NAND, NAND_TEST_START_BLOCK, NAND_TEST_END_BLOCK, 1); T = chVTGetSystemTimeX() - T; adc_ints = dma_storm_adc_stop(); uart_ints = dma_storm_uart_stop(); @@ -611,9 +625,9 @@ int main(void) { * ensure that NAND code have negligible impact on other subsystems */ osalDbgCheck(background_cnt > (BackgroundThdCnt / 4)); - osalDbgCheck(abs(adc_ints - adc_idle_ints) < (adc_idle_ints / 20)); + osalDbgCheck(abs(adc_ints - adc_idle_ints) < (adc_idle_ints / 20)); osalDbgCheck(abs(uart_ints - uart_idle_ints) < (uart_idle_ints / 20)); - osalDbgCheck(abs(spi_ints - spi_idle_ints) < (spi_idle_ints / 10)); + osalDbgCheck(abs(spi_ints - spi_idle_ints) < (spi_idle_ints / 10)); /* * perform ECC calculation test diff --git a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h index a9c0daf..985d65a 100644 --- a/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h +++ b/testhal/STM32/STM32F4xx/FSMC_NAND/mcuconf_community.h @@ -21,7 +21,7 @@ #define STM32_FSMC_FSMC1_IRQ_PRIORITY 10 #define STM32_NAND_USE_FSMC_NAND1 TRUE -#define STM32_NAND_USE_EXT_INT TRUE +#define STM32_NAND_USE_EXT_INT FALSE #define STM32_NAND_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_NAND_DMA_PRIORITY 0 #define STM32_NAND_DMA_ERROR_HOOK(nandp) osalSysHalt("DMA failure") |