Merge pull request #66 from pl4nkton/stm32_fixes

Stm32 fixes

6 files changed, 164 insertions, 18 deletions

diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile
index 83f901c..c786de6 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/Makefile
@@ -43,6 +43,12 @@ ifeq ($(USE_VERBOSE_COMPILE),)
   USE_VERBOSE_COMPILE = no
 endif
 
+# If enabled, this option makes the build process faster by not compiling
+# modules not used in the current configuration.
+ifeq ($(USE_SMART_BUILD),)
+  USE_SMART_BUILD = no
+endif
+
 #
 # Build global options
 ##############################################################################
@@ -63,7 +69,7 @@ ifeq ($(USE_EXCEPTIONS_STACKSIZE),)
   USE_EXCEPTIONS_STACKSIZE = 0x400
 endif
 
-# Enables the use of FPU on Cortex-M4 (no, softfp, hard).
+# Enables the use of FPU (no, softfp, hard).
 ifeq ($(USE_FPU),)
   USE_FPU = no
 endif
@@ -182,7 +188,7 @@ AOPT =
 TOPT = -mthumb -DTHUMB
 
 # Define C warning options here
-CWARN = -Wall -Wextra -Wstrict-prototypes
+CWARN = -Wall -Wextra -Wundef -Wstrict-prototypes
 
 # Define C++ warning options here
 CPPWARN = -Wall -Wextra
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
index 01cc4a0..1065821 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/chconf.h
@@ -1,5 +1,5 @@
 /*
-    ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -25,8 +25,8 @@
  * @{
  */
 
-#ifndef _CHCONF_H_
-#define _CHCONF_H_
+#ifndef CHCONF_H
+#define CHCONF_H
 
 #define _CHIBIOS_RT_CONF_
 
@@ -351,17 +351,16 @@
 
 /**
  * @brief   Debug option, trace buffer.
- * @details If enabled then the context switch circular trace buffer is
- *          activated.
+ * @details If enabled then the trace buffer is activated.
  *
- * @note    The default is @p CH_DBG_TRACE_MASK_NONE.
+ * @note    The default is @p CH_DBG_TRACE_MASK_DISABLED.
  */
-#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_NONE
+#define CH_DBG_TRACE_MASK                   CH_DBG_TRACE_MASK_DISABLED
 
 /**
  * @brief   Trace buffer entries.
  * @note    The trace buffer is only allocated if @p CH_DBG_TRACE_MASK is
- *          different from @p CH_DBG_TRACE_MASK_NONE.
+ *          different from @p CH_DBG_TRACE_MASK_DISABLED.
  */
 #define CH_DBG_TRACE_BUFFER_SIZE            128
 
@@ -498,7 +497,7 @@
  *          the system is halted.
  */
 #define CH_CFG_SYSTEM_HALT_HOOK(reason) {                                   \
-  /* Halt code here.*/                                                      \
+  /* System halt code here.*/                                               \
 }
 
 /**
@@ -516,6 +515,6 @@
 /* Port-specific settings (override port settings defaulted in chcore.h).    */
 /*===========================================================================*/
 
-#endif  /* _CHCONF_H_ */
+#endif  /* CHCONF_H */
 
 /** @} */
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf.h
index bc2b9e0..e690d15 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf.h
@@ -1,5 +1,5 @@
 /*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -25,8 +25,8 @@
  * @{
  */
 
-#ifndef _HALCONF_H_
-#define _HALCONF_H_
+#ifndef HALCONF_H
+#define HALCONF_H
 
 #include "mcuconf.h"
 
@@ -52,6 +52,13 @@
 #endif
 
 /**
+ * @brief   Enables the DAC subsystem.
+ */
+#if !defined(HAL_USE_DAC) || defined(__DOXYGEN__)
+#define HAL_USE_DAC                 FALSE
+#endif
+
+/**
  * @brief   Enables the EXT subsystem.
  */
 #if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
@@ -287,7 +294,7 @@
  * @brief   Serial buffers size.
  * @details Configuration parameter, you can change the depth of the queue
  *          buffers depending on the requirements of your application.
- * @note    The default is 64 bytes for both the transmission and receive
+ * @note    The default is 16 bytes for both the transmission and receive
  *          buffers.
  */
 #if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
@@ -295,6 +302,29 @@
 #endif
 
 /*===========================================================================*/
+/* SERIAL_USB driver related setting.                                        */
+/*===========================================================================*/
+
+/**
+ * @brief   Serial over USB buffers size.
+ * @details Configuration parameter, the buffer size must be a multiple of
+ *          the USB data endpoint maximum packet size.
+ * @note    The default is 256 bytes for both the transmission and receive
+ *          buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_SIZE     256
+#endif
+
+/**
+ * @brief   Serial over USB number of buffers.
+ * @note    The default is 2 buffers.
+ */
+#if !defined(SERIAL_USB_BUFFERS_NUMBER) || defined(__DOXYGEN__)
+#define SERIAL_USB_BUFFERS_NUMBER   2
+#endif
+
+/*===========================================================================*/
 /* SPI driver related settings.                                              */
 /*===========================================================================*/
 
@@ -315,11 +345,43 @@
 #endif
 
 /*===========================================================================*/
+/* UART driver related settings.                                             */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_WAIT) || defined(__DOXYGEN__)
+#define UART_USE_WAIT               FALSE
+#endif
+
+/**
+ * @brief   Enables the @p uartAcquireBus() and @p uartReleaseBus() APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(UART_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define UART_USE_MUTUAL_EXCLUSION   FALSE
+#endif
+
+/*===========================================================================*/
+/* USB driver related settings.                                              */
+/*===========================================================================*/
+
+/**
+ * @brief   Enables synchronous APIs.
+ * @note    Disabling this option saves both code and data space.
+ */
+#if !defined(USB_USE_WAIT) || defined(__DOXYGEN__)
+#define USB_USE_WAIT                FALSE
+#endif
+
+/*===========================================================================*/
 /* Community drivers's includes                                              */
 /*===========================================================================*/
 
 #include "halconf_community.h"
 
-#endif /* _HALCONF_H_ */
+#endif /* HALCONF_H */
 
 /** @} */
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h
index ecc275a..606fed4 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/halconf_community.h
@@ -45,6 +45,27 @@
 #define HAL_USE_ONEWIRE             FALSE

 #endif

 

+/**

+ * @brief   Enables the EICU subsystem.

+ */

+#if !defined(HAL_USE_EICU) || defined(__DOXYGEN__)

+#define HAL_USE_EICU                FALSE

+#endif

+

+/**

+ * @brief   Enables the CRC subsystem.

+ */

+#if !defined(HAL_USE_CRC) || defined(__DOXYGEN__)

+#define HAL_USE_CRC                 FALSE

+#endif

+

+/**

+ * @brief   Enables the RNG subsystem.

+ */

+#if !defined(HAL_USE_RNG) || defined(__DOXYGEN__)

+#define HAL_USE_RNG                 FALSE

+#endif

+

 /*===========================================================================*/

 /* FSMCNAND driver related settings.                                         */

 /*===========================================================================*/

diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h
index 5589f94..4737002 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf.h
@@ -1,5 +1,5 @@
 /*
-    ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+    ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio
 
     Licensed under the Apache License, Version 2.0 (the "License");
     you may not use this file except in compliance with the License.
@@ -14,6 +14,9 @@
     limitations under the License.
 */
 
+#ifndef MCUCONF_H
+#define MCUCONF_H
+
 /*
  * STM32F4xx drivers configuration.
  * The following settings override the default settings present in
@@ -88,6 +91,19 @@
 #define STM32_CAN_CAN2_IRQ_PRIORITY         11
 
 /*
+ * DAC driver system settings.
+ */
+#define STM32_DAC_DUAL_MODE                 FALSE
+#define STM32_DAC_USE_DAC1_CH1              FALSE
+#define STM32_DAC_USE_DAC1_CH2              FALSE
+#define STM32_DAC_DAC1_CH1_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH2_IRQ_PRIORITY     10
+#define STM32_DAC_DAC1_CH1_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH2_DMA_PRIORITY     2
+#define STM32_DAC_DAC1_CH1_DMA_STREAM       STM32_DMA_STREAM_ID(1, 5)
+#define STM32_DAC_DAC1_CH2_DMA_STREAM       STM32_DMA_STREAM_ID(1, 6)
+
+/*
  * EXT driver system settings.
  */
 #define STM32_EXT_EXTI0_IRQ_PRIORITY        6
@@ -155,6 +171,21 @@
 #define STM32_I2C_DMA_ERROR_HOOK(i2cp)      osalSysHalt("DMA failure")
 
 /*
+ * I2S driver system settings.
+ */
+#define STM32_I2S_USE_SPI2                  FALSE
+#define STM32_I2S_USE_SPI3                  FALSE
+#define STM32_I2S_SPI2_IRQ_PRIORITY         10
+#define STM32_I2S_SPI3_IRQ_PRIORITY         10
+#define STM32_I2S_SPI2_DMA_PRIORITY         1
+#define STM32_I2S_SPI3_DMA_PRIORITY         1
+#define STM32_I2S_SPI2_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 3)
+#define STM32_I2S_SPI2_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2S_SPI3_RX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2S_SPI3_TX_DMA_STREAM        STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2S_DMA_ERROR_HOOK(i2sp)      osalSysHalt("DMA failure")
+
+/*
  * ICU driver system settings.
  */
 #define STM32_ICU_USE_TIM1                  FALSE
@@ -304,6 +335,13 @@
 #define STM32_USB_OTGFIFO_FILL_BASEPRI      0
 
 /*
+ * WDG driver system settings.
+ */
+#define STM32_WDG_USE_IWDG                  FALSE
+
+/*
  * header for community drivers.
  */
 #include "mcuconf_community.h"
+
+#endif /* MCUCONF_H */
diff --git a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h
index 81c7e2c..f60cbee 100644
--- a/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h
+++ b/testhal/STM32/STM32F4xx/FSMC_SDRAM/mcuconf_community.h
@@ -21,8 +21,28 @@
 #define STM32_FSMC_FSMC1_IRQ_PRIORITY       10
 
 /*
+ * FSMC NAND driver system settings.
+ */
+#define STM32_NAND_USE_FSMC_NAND1           FALSE
+#define STM32_NAND_USE_FSMC_NAND2           FALSE
+
+/*
  * FSMC SDRAM driver system settings.
  */
 #define STM32_USE_FSMC_SDRAM                TRUE
 #define STM32_SDRAM_USE_FSMC_SDRAM1         FALSE
 #define STM32_SDRAM_USE_FSMC_SDRAM2         TRUE
+
+/*
+ * FSMC SRAM driver system settings.
+ */
+#define STM32_USE_FSMC_SRAM                 FALSE
+#define STM32_SRAM_USE_FSMC_SRAM1           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM2           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM3           FALSE
+#define STM32_SRAM_USE_FSMC_SRAM4           FALSE
+
+/*
+ * FSMC PC card driver system settings.
+ */
+#define STM32_USE_FSMC_PCCARD               FALSE