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author | Fabien Poussin <fabien.poussin@gmail.com> | 2019-10-01 19:51:04 +0200 |
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committer | Fabien Poussin <fabien.poussin@gmail.com> | 2019-10-02 10:47:02 +0200 |
commit | 8a0095ecd93309d011877f3cc8185a034d941b26 (patch) | |
tree | 523330b50c1abf1ff969575eaf7ff33f5e7a59d9 /testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h | |
parent | f9f0c2d10cc7192639f85da017cbdb83ab6a9afa (diff) | |
download | ChibiOS-Contrib-8a0095ecd93309d011877f3cc8185a034d941b26.tar.gz ChibiOS-Contrib-8a0095ecd93309d011877f3cc8185a034d941b26.tar.bz2 ChibiOS-Contrib-8a0095ecd93309d011877f3cc8185a034d941b26.zip |
Updated testhal for 19.1.x
Diffstat (limited to 'testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h')
-rw-r--r-- | testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h b/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h index 14f1daf..b2cec6c 100644 --- a/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h +++ b/testhal/STM32/STM32F4xx/FSMC_SRAM/mcuconf.h @@ -86,9 +86,9 @@ * ADC driver system settings. */ #define STM32_ADC_ADCPRE ADC_CCR_ADCPRE_DIV4 -#define STM32_ADC_USE_ADC1 TRUE -#define STM32_ADC_USE_ADC2 TRUE -#define STM32_ADC_USE_ADC3 TRUE +#define STM32_ADC_USE_ADC1 FALSE +#define STM32_ADC_USE_ADC2 FALSE +#define STM32_ADC_USE_ADC3 FALSE #define STM32_ADC_ADC1_DMA_STREAM STM32_DMA_STREAM_ID(2, 4) #define STM32_ADC_ADC2_DMA_STREAM STM32_DMA_STREAM_ID(2, 2) #define STM32_ADC_ADC3_DMA_STREAM STM32_DMA_STREAM_ID(2, 1) @@ -190,7 +190,7 @@ */ #define STM32_ICU_USE_TIM1 FALSE #define STM32_ICU_USE_TIM2 FALSE -#define STM32_ICU_USE_TIM3 FALSE +#define STM32_ICU_USE_TIM3 TRUE #define STM32_ICU_USE_TIM4 FALSE #define STM32_ICU_USE_TIM5 FALSE #define STM32_ICU_USE_TIM8 FALSE @@ -218,7 +218,7 @@ * PWM driver system settings. */ #define STM32_PWM_USE_ADVANCED FALSE -#define STM32_PWM_USE_TIM1 FALSE +#define STM32_PWM_USE_TIM1 TRUE #define STM32_PWM_USE_TIM2 FALSE #define STM32_PWM_USE_TIM3 FALSE #define STM32_PWM_USE_TIM4 FALSE @@ -252,7 +252,7 @@ #define STM32_SERIAL_USE_USART3 FALSE #define STM32_SERIAL_USE_UART4 FALSE #define STM32_SERIAL_USE_UART5 FALSE -#define STM32_SERIAL_USE_USART6 TRUE +#define STM32_SERIAL_USE_USART6 FALSE #define STM32_SERIAL_USART1_PRIORITY 12 #define STM32_SERIAL_USART2_PRIORITY 12 #define STM32_SERIAL_USART3_PRIORITY 12 @@ -294,7 +294,7 @@ #define STM32_UART_USE_USART3 FALSE #define STM32_UART_USE_UART4 FALSE #define STM32_UART_USE_UART5 FALSE -#define STM32_UART_USE_USART6 TRUE +#define STM32_UART_USE_USART6 FALSE #define STM32_UART_USART1_RX_DMA_STREAM STM32_DMA_STREAM_ID(2, 5) #define STM32_UART_USART1_TX_DMA_STREAM STM32_DMA_STREAM_ID(2, 7) #define STM32_UART_USART2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 5) |