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| author | barthess <barthess@yandex.ru> | 2016-12-09 18:00:28 +0300 |
|---|---|---|
| committer | barthess <barthess@yandex.ru> | 2016-12-09 18:00:28 +0300 |
| commit | 53d3fd07f381f2dac8a39913ebe7062c8076cd30 (patch) | |
| tree | d3df55d1672dbe1fc735cf055148c4c9e490e9c2 /testhal | |
| parent | 319c9f9ee259cc7ae05bbff952b149118e6dc032 (diff) | |
| download | ChibiOS-Contrib-53d3fd07f381f2dac8a39913ebe7062c8076cd30.tar.gz ChibiOS-Contrib-53d3fd07f381f2dac8a39913ebe7062c8076cd30.tar.bz2 ChibiOS-Contrib-53d3fd07f381f2dac8a39913ebe7062c8076cd30.zip | |
FSMC. Sync mode improvements.
1) Control registers writes reordered in init sequence to eliminate
incorrect output clock frequnency in short period after CCLKEN bit
set and B(W)TR registers set.
2) Added reset of CCLEN bit in stop procedure.
Diffstat (limited to 'testhal')
0 files changed, 0 insertions, 0 deletions