diff options
Diffstat (limited to 'os/hal/ports/STM32/LLD/USBHv1/hal_stm32_otg.h')
| -rw-r--r-- | os/hal/ports/STM32/LLD/USBHv1/hal_stm32_otg.h | 17 |
1 files changed, 11 insertions, 6 deletions
diff --git a/os/hal/ports/STM32/LLD/USBHv1/hal_stm32_otg.h b/os/hal/ports/STM32/LLD/USBHv1/hal_stm32_otg.h index b88e620..3322e51 100644 --- a/os/hal/ports/STM32/LLD/USBHv1/hal_stm32_otg.h +++ b/os/hal/ports/STM32/LLD/USBHv1/hal_stm32_otg.h @@ -1,5 +1,5 @@ /* - ChibiOS - Copyright (C) 2006..2015 Giovanni Di Sirio + ChibiOS - Copyright (C) 2006..2016 Giovanni Di Sirio Licensed under the Apache License, Version 2.0 (the "License"); you may not use this file except in compliance with the License. @@ -23,8 +23,8 @@ */ -#ifndef HAL_STM32_OTG_H_ -#define HAL_STM32_OTG_H_ +#ifndef HAL_STM32_OTG_H +#define HAL_STM32_OTG_H /** * @brief Number of the implemented endpoints in OTG_FS. @@ -430,12 +430,16 @@ typedef struct { * @name GCCFG register bit definitions * @{ */ +/* Definitions for stepping 1.*/ #define GCCFG_NOVBUSSENS (1U<<21) /**< VBUS sensing disable. */ #define GCCFG_SOFOUTEN (1U<<20) /**< SOF output enable. */ #define GCCFG_VBUSBSEN (1U<<19) /**< Enable the VBUS sensing "B" device. */ #define GCCFG_VBUSASEN (1U<<18) /**< Enable the VBUS sensing "A" device. */ + +/* Definitions for stepping 2.*/ +#define GCCFG_VBDEN (1U<<21) /**< VBUS sensing enable. */ #define GCCFG_PWRDWN (1U<<16) /**< Power down. */ /** @} */ @@ -571,7 +575,7 @@ typedef struct { #define HCCHAR_EPDIR (1U<<15) /**< Endpoint direction. */ #define HCCHAR_EPNUM_MASK (15U<<11) /**< Endpoint number mask. */ #define HCCHAR_EPNUM(n) ((n)<<11) /**< Endpoint number value. */ -#define HCCHAR_MPS_MASK (0x7FFU<<0) /**< Maximum packet size mask. */ +#define HCCHAR_MPS_MASK (0x7FFU<<0) /**< Maximum packet size mask. */ #define HCCHAR_MPS(n) ((n)<<0) /**< Maximum packet size value. */ /** @} */ @@ -590,6 +594,7 @@ typedef struct { interrupt. */ #define HCINT_STALL (1U<<3) /**< STALL response received interrupt. */ +#define HCINT_AHBERR (1U<<2) /**< AHB error interrupt. */ #define HCINT_CHH (1U<<1) /**< Channel halted. */ #define HCINT_XFRC (1U<<0) /**< Transfer completed. */ /** @} */ @@ -611,7 +616,7 @@ typedef struct { interrupt mask. */ #define HCINTMSK_STALLM (1U<<3) /**< STALL response received interrupt mask. */ -#define HCINTMSK_AHBERRM (1U<<2) +#define HCINTMSK_AHBERRM (1U<<2) /**< AHB error interrupt mask. */ #define HCINTMSK_CHHM (1U<<1) /**< Channel halted mask. */ #define HCINTMSK_XFRCM (1U<<0) /**< Transfer completed mask. */ /** @} */ @@ -924,6 +929,6 @@ typedef struct { */ #define OTG_HS ((stm32_otg_t *)OTG_HS_ADDR) -#endif /* _STM32_OTG_H_ */ +#endif /* STM32_OTG_H */ /** @} */ |