git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@7818 35acf78f-673a-0410-8e92-d51de3d6d3f4

2 files changed, 12 insertions, 6 deletions

diff --git a/os/rt/ports/ARM/chcore.h b/os/rt/ports/ARM/chcore.h
index 9f255ccd2..b660323c7 100644
--- a/os/rt/ports/ARM/chcore.h
+++ b/os/rt/ports/ARM/chcore.h
@@ -268,6 +268,12 @@ struct context {
                          ((size_t)(n)) + ((size_t)(PORT_INT_REQUIRED_STACK)))

 

 /**

+ * @brief   Priority level verification macro.

+ * @todo    Add the required parameters to armparams.h.

+ */

+#define PORT_IRQ_IS_VALID_PRIORITY(n) false

+

+/**

  * @brief   IRQ prologue code.

  * @details This macro must be inserted at the start of all IRQ handlers

  *          enabled to invoke system APIs.

@@ -474,10 +480,10 @@ static inline void port_disable(void) {
   __asm volatile ("bl     _port_disable_thumb" : : : "r3", "lr", "memory");

 #else

   __asm volatile ("mrs     r3, CPSR                       \n\t"

-                "orr     r3, #0x80                      \n\t"

-                "msr     CPSR_c, r3                     \n\t"

-                "orr     r3, #0x40                      \n\t"

-                "msr     CPSR_c, r3" : : : "r3", "memory");

+                  "orr     r3, #0x80                      \n\t"

+                  "msr     CPSR_c, r3                     \n\t"

+                  "orr     r3, #0x40                      \n\t"

+                  "msr     CPSR_c, r3" : : : "r3", "memory");

 #endif

 }

 

diff --git a/release_note.txt b/release_note.txt
index f54b9d4ac..679839543 100644
--- a/release_note.txt
+++ b/release_note.txt
@@ -14,7 +14,7 @@ What's new in RT 3.0
 - Entirely static for enhanced safety.

 - System data is now encapsulated in a single "ch" global structure for enhanced safety.

 - System integrity check runtime functionality for enhanced safety.

-- Tickless kernel mode helps implement ultra-low-power devices.

+- Tick-less kernel mode helps implement ultra-low-power devices.

 - High Resolution Virtual Timers module allows to specify very short intervals.

 - High Resolution system time.

 - Clock-cycle accurate Time Measurement module.

@@ -45,7 +45,7 @@ New addition NIL 1.0
 - Entirely static for enhanced safety.

 - No linked lists anywhere in the code for enhanced safety.

 - System data is encapsulated in a single "nil" global structure for enhanced safety.

-- Tickless kernel mode helps implement ultra-low-power devices.

+- Tick-less kernel mode helps implement ultra-low-power devices.

 - Ultra compact kernel, well below 1kB in its maximum configuration.

 - Upward compatible with RT, it implements a subset of the RT API.

 - Reduced RAM usage, 20-28 bytes for task and just 4 bytes for a semaphore on 32 bits architectures, half of that on 8/16 bits architectures.