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| author | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2017-05-29 19:43:54 +0000 |
|---|---|---|
| committer | Rocco Marco Guglielmi <roccomarco.guglielmi@live.com> | 2017-05-29 19:43:54 +0000 |
| commit | 2045fd61b92f77bcf458ec88b1590b1f9a0faa5c (patch) | |
| tree | aaa92216f8e38af411cc1e67e79d23747cdd2f94 | |
| parent | ceb326112d0dfd0ec3ab53995b6b7810903b8a42 (diff) | |
| download | ChibiOS-2045fd61b92f77bcf458ec88b1590b1f9a0faa5c.tar.gz ChibiOS-2045fd61b92f77bcf458ec88b1590b1f9a0faa5c.tar.bz2 ChibiOS-2045fd61b92f77bcf458ec88b1590b1f9a0faa5c.zip | |
Fixed Bug #843
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10230 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c | 34 | ||||
| -rw-r--r-- | readme.txt | 2 |
2 files changed, 19 insertions, 17 deletions
diff --git a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c index 0cc15f415..778698114 100644 --- a/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c +++ b/os/hal/ports/STM32/LLD/TIMv1/hal_gpt_lld.c @@ -677,10 +677,10 @@ void gpt_lld_start(GPTDriver *gptp) { "invalid frequency");
/* Timer configuration.*/
- gptp->tim->CR1 = 0; /* Initially stopped. */
- gptp->tim->CR2 = gptp->config->cr2;
- gptp->tim->PSC = psc; /* Prescaler value. */
- gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->CR1 = 0; /* Initially stopped. */
+ gptp->tim->CR2 = gptp->config->cr2;
+ gptp->tim->PSC = psc; /* Prescaler value. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
gptp->tim->DIER = gptp->config->dier & /* DMA-related DIER bits. */
~STM32_TIM_DIER_IRQ_MASK;
}
@@ -695,9 +695,9 @@ void gpt_lld_start(GPTDriver *gptp) { void gpt_lld_stop(GPTDriver *gptp) {
if (gptp->state == GPT_READY) {
- gptp->tim->CR1 = 0; /* Timer disabled. */
+ gptp->tim->CR1 = 0; /* Timer disabled. */
gptp->tim->DIER = 0; /* All IRQs disabled. */
- gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
#if STM32_GPT_USE_TIM1
if (&GPTD1 == gptp) {
@@ -819,14 +819,14 @@ void gpt_lld_stop(GPTDriver *gptp) { */
void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) {
- gptp->tim->ARR = (uint32_t)(interval - 1); /* Time constant. */
- gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
- gptp->tim->CNT = 0; /* Reset counter. */
+ gptp->tim->ARR = (uint32_t)(interval); /* Time constant. */
+ gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
+ gptp->tim->CNT = 0; /* Reset counter. */
/* NOTE: After generating the UG event it takes several clock cycles before
SR bit 0 goes to 1. This is why the clearing of CNT has been inserted
before the clearing of SR, to give it some time.*/
- gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
if (NULL != gptp->config->callback)
gptp->tim->DIER |= STM32_TIM_DIER_UIE; /* Update Event IRQ enabled.*/
gptp->tim->CR1 = STM32_TIM_CR1_ARPE | STM32_TIM_CR1_URS | STM32_TIM_CR1_CEN;
@@ -841,8 +841,8 @@ void gpt_lld_start_timer(GPTDriver *gptp, gptcnt_t interval) { */
void gpt_lld_stop_timer(GPTDriver *gptp) {
- gptp->tim->CR1 = 0; /* Initially stopped. */
- gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->CR1 = 0; /* Initially stopped. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
/* All interrupts disabled.*/
gptp->tim->DIER &= ~STM32_TIM_DIER_IRQ_MASK;
@@ -861,13 +861,13 @@ void gpt_lld_stop_timer(GPTDriver *gptp) { */
void gpt_lld_polled_delay(GPTDriver *gptp, gptcnt_t interval) {
- gptp->tim->ARR = (uint32_t)(interval - 1); /* Time constant. */
- gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
- gptp->tim->SR = 0; /* Clear pending IRQs. */
- gptp->tim->CR1 = STM32_TIM_CR1_OPM | STM32_TIM_CR1_URS | STM32_TIM_CR1_CEN;
+ gptp->tim->ARR = (uint32_t)(interval); /* Time constant. */
+ gptp->tim->EGR = STM32_TIM_EGR_UG; /* Update event. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->CR1 = STM32_TIM_CR1_OPM | STM32_TIM_CR1_URS | STM32_TIM_CR1_CEN;
while (!(gptp->tim->SR & STM32_TIM_SR_UIF))
;
- gptp->tim->SR = 0; /* Clear pending IRQs. */
+ gptp->tim->SR = 0; /* Clear pending IRQs. */
}
/**
diff --git a/readme.txt b/readme.txt index e9b74eada..b369ab8cc 100644 --- a/readme.txt +++ b/readme.txt @@ -161,6 +161,8 @@ - RT: Merged RT4.
- NIL: Merged NIL2.
- NIL: Added STM32F7 demo.
+- HAL: Fixed wrong ARR initialization in STM32 GPT driver (bug #843)(backported
+ to 16.1.9).
- HAL: Fixed wrong configuration in STM32L4xx GPT-ADC demo (bug #842)(backported
to 16.1.9).
- HAL: Fixed invalid DMA channels for STM32F334 ADC2 (bug #840)(backported
|