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| author | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-06-17 12:58:41 +0000 |
|---|---|---|
| committer | Giovanni Di Sirio <gdisirio@gmail.com> | 2016-06-17 12:58:41 +0000 |
| commit | 458e6a84df1beb84f21c7e57147dec8c44f1d751 (patch) | |
| tree | 09a63f4f6aaee24e5930448b7d38bd66d7063f3b | |
| parent | 67b83e80b6539c4cfef7ae575b9655ab193bef96 (diff) | |
| download | ChibiOS-458e6a84df1beb84f21c7e57147dec8c44f1d751.tar.gz ChibiOS-458e6a84df1beb84f21c7e57147dec8c44f1d751.tar.bz2 ChibiOS-458e6a84df1beb84f21c7e57147dec8c44f1d751.zip | |
Added CR2 setting to STM32 SPIv1 driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@9640 35acf78f-673a-0410-8e92-d51de3d6d3f4
| -rw-r--r-- | os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c | 3 | ||||
| -rw-r--r-- | os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h | 6 | ||||
| -rw-r--r-- | testhal/STM32/STM32F1xx/SPI/main.c | 4 | ||||
| -rw-r--r-- | testhal/STM32/STM32F4xx/SPI/main.c | 4 | ||||
| -rw-r--r-- | testhal/STM32/STM32L0xx/SPI/main.c | 4 | ||||
| -rw-r--r-- | testhal/STM32/STM32L1xx/SPI/main.c | 4 |
6 files changed, 19 insertions, 6 deletions
diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c index 15cc0d1e7..8baf59717 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.c @@ -425,7 +425,8 @@ void spi_lld_start(SPIDriver *spip) { spip->spi->CR1 = 0;
spip->spi->CR1 = spip->config->cr1 | SPI_CR1_MSTR | SPI_CR1_SSM |
SPI_CR1_SSI;
- spip->spi->CR2 = SPI_CR2_SSOE | SPI_CR2_RXDMAEN | SPI_CR2_TXDMAEN;
+ spip->spi->CR2 = spip->config->cr2 | SPI_CR2_SSOE | SPI_CR2_RXDMAEN |
+ SPI_CR2_TXDMAEN;
spip->spi->CR1 |= SPI_CR1_SPE;
}
diff --git a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h index 661dc9a4b..2f3435ea2 100644 --- a/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h +++ b/os/hal/ports/STM32/LLD/SPIv1/hal_spi_lld.h @@ -431,9 +431,13 @@ typedef struct { */
uint16_t sspad;
/**
- * @brief SPI initialization data.
+ * @brief SPI CR1 register initialization data.
*/
uint16_t cr1;
+ /**
+ * @brief SPI CR2 register initialization data.
+ */
+ uint16_t cr2;
} SPIConfig;
/**
diff --git a/testhal/STM32/STM32F1xx/SPI/main.c b/testhal/STM32/STM32F1xx/SPI/main.c index e5ecd39e4..1c510fef0 100644 --- a/testhal/STM32/STM32F1xx/SPI/main.c +++ b/testhal/STM32/STM32F1xx/SPI/main.c @@ -24,6 +24,7 @@ static const SPIConfig hs_spicfg = { NULL,
GPIOA,
GPIOA_SPI1NSS,
+ 0,
0
};
@@ -34,7 +35,8 @@ static const SPIConfig ls_spicfg = { NULL,
GPIOA,
GPIOA_SPI1NSS,
- SPI_CR1_BR_2 | SPI_CR1_BR_1
+ SPI_CR1_BR_2 | SPI_CR1_BR_1,
+ 0
};
/*
diff --git a/testhal/STM32/STM32F4xx/SPI/main.c b/testhal/STM32/STM32F4xx/SPI/main.c index 5bd98fdde..58ed9cbb9 100644 --- a/testhal/STM32/STM32F4xx/SPI/main.c +++ b/testhal/STM32/STM32F4xx/SPI/main.c @@ -24,6 +24,7 @@ static const SPIConfig hs_spicfg = { NULL,
GPIOB,
12,
+ 0,
0
};
@@ -34,7 +35,8 @@ static const SPIConfig ls_spicfg = { NULL,
GPIOB,
12,
- SPI_CR1_BR_2 | SPI_CR1_BR_1
+ SPI_CR1_BR_2 | SPI_CR1_BR_1,
+ 0
};
/*
diff --git a/testhal/STM32/STM32L0xx/SPI/main.c b/testhal/STM32/STM32L0xx/SPI/main.c index e8bea428f..6c5de1173 100644 --- a/testhal/STM32/STM32L0xx/SPI/main.c +++ b/testhal/STM32/STM32L0xx/SPI/main.c @@ -24,6 +24,7 @@ static const SPIConfig hs_spicfg = { NULL,
GPIOB,
12,
+ 0,
0
};
@@ -34,7 +35,8 @@ static const SPIConfig ls_spicfg = { NULL,
GPIOB,
12,
- SPI_CR1_BR_2 | SPI_CR1_BR_1
+ SPI_CR1_BR_2 | SPI_CR1_BR_1,
+ 0
};
/*
diff --git a/testhal/STM32/STM32L1xx/SPI/main.c b/testhal/STM32/STM32L1xx/SPI/main.c index 0e0e119a1..f70d4f7c8 100644 --- a/testhal/STM32/STM32L1xx/SPI/main.c +++ b/testhal/STM32/STM32L1xx/SPI/main.c @@ -24,6 +24,7 @@ static const SPIConfig hs_spicfg = { NULL,
GPIOB,
12,
+ 0,
0
};
@@ -34,7 +35,8 @@ static const SPIConfig ls_spicfg = { NULL,
GPIOB,
12,
- SPI_CR1_BR_2 | SPI_CR1_BR_1
+ SPI_CR1_BR_2 | SPI_CR1_BR_1,
+ 0
};
/*
|