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| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-08-09 10:07:11 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-08-09 10:07:11 +0000 |
| commit | 0752e9d7e973161c32e4b667c7a8d06c68b0a9eb (patch) | |
| tree | ffef0d84a300ba2e30aac20b3e89393d0d5e7bb1 /boards/ST_STM32L_DISCOVERY/board.c | |
| parent | 45b489851878769402af4a353fa2b759c815be39 (diff) | |
| download | ChibiOS-0752e9d7e973161c32e4b667c7a8d06c68b0a9eb.tar.gz ChibiOS-0752e9d7e973161c32e4b667c7a8d06c68b0a9eb.tar.bz2 ChibiOS-0752e9d7e973161c32e4b667c7a8d06c68b0a9eb.zip | |
I2C. Syncing with trunk (step 1)
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3214 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards/ST_STM32L_DISCOVERY/board.c')
| -rw-r--r-- | boards/ST_STM32L_DISCOVERY/board.c | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/boards/ST_STM32L_DISCOVERY/board.c b/boards/ST_STM32L_DISCOVERY/board.c index 37015943a..4a93dada2 100644 --- a/boards/ST_STM32L_DISCOVERY/board.c +++ b/boards/ST_STM32L_DISCOVERY/board.c @@ -29,12 +29,12 @@ #if HAL_USE_PAL || defined(__DOXYGEN__)
const PALConfig pal_default_config =
{
- {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR},
- {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR},
- {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR},
- {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR},
- {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR},
- {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR}
+ {VAL_GPIOA_MODER, VAL_GPIOA_OTYPER, VAL_GPIOA_OSPEEDR, VAL_GPIOA_PUPDR, VAL_GPIOA_ODR, VAL_GPIOA_AFRL, VAL_GPIOA_AFRH},
+ {VAL_GPIOB_MODER, VAL_GPIOB_OTYPER, VAL_GPIOB_OSPEEDR, VAL_GPIOB_PUPDR, VAL_GPIOB_ODR, VAL_GPIOB_AFRL, VAL_GPIOB_AFRH},
+ {VAL_GPIOC_MODER, VAL_GPIOC_OTYPER, VAL_GPIOC_OSPEEDR, VAL_GPIOC_PUPDR, VAL_GPIOC_ODR, VAL_GPIOC_AFRL, VAL_GPIOC_AFRH},
+ {VAL_GPIOD_MODER, VAL_GPIOD_OTYPER, VAL_GPIOD_OSPEEDR, VAL_GPIOD_PUPDR, VAL_GPIOD_ODR, VAL_GPIOD_AFRL, VAL_GPIOD_AFRH},
+ {VAL_GPIOE_MODER, VAL_GPIOE_OTYPER, VAL_GPIOE_OSPEEDR, VAL_GPIOE_PUPDR, VAL_GPIOE_ODR, VAL_GPIOE_AFRL, VAL_GPIOE_AFRH},
+ {VAL_GPIOH_MODER, VAL_GPIOH_OTYPER, VAL_GPIOH_OSPEEDR, VAL_GPIOH_PUPDR, VAL_GPIOH_ODR, VAL_GPIOH_AFRL, VAL_GPIOH_AFRH}
};
#endif
|