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authorbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-08-09 10:07:11 +0000
committerbarthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4>2011-08-09 10:07:11 +0000
commit0752e9d7e973161c32e4b667c7a8d06c68b0a9eb (patch)
treeffef0d84a300ba2e30aac20b3e89393d0d5e7bb1 /boards/ST_STM32L_DISCOVERY/board.h
parent45b489851878769402af4a353fa2b759c815be39 (diff)
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I2C. Syncing with trunk (step 1)
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3214 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards/ST_STM32L_DISCOVERY/board.h')
-rw-r--r--boards/ST_STM32L_DISCOVERY/board.h28
1 files changed, 28 insertions, 0 deletions
diff --git a/boards/ST_STM32L_DISCOVERY/board.h b/boards/ST_STM32L_DISCOVERY/board.h
index ddad89b5e..d95480c15 100644
--- a/boards/ST_STM32L_DISCOVERY/board.h
+++ b/boards/ST_STM32L_DISCOVERY/board.h
@@ -69,6 +69,22 @@
#define PIN_PUDR_FLOATING(n) (0 << ((n) * 2))
#define PIN_PUDR_PULLUP(n) (1 << ((n) * 2))
#define PIN_PUDR_PULLDOWN(n) (2 << ((n) * 2))
+#define PIN_AFIO_AF0(n) (0 << ((n % 8) * 4))
+#define PIN_AFIO_AF1(n) (1 << ((n % 8) * 4))
+#define PIN_AFIO_AF2(n) (2 << ((n % 8) * 4))
+#define PIN_AFIO_AF3(n) (3 << ((n % 8) * 4))
+#define PIN_AFIO_AF4(n) (4 << ((n % 8) * 4))
+#define PIN_AFIO_AF5(n) (5 << ((n % 8) * 4))
+#define PIN_AFIO_AF6(n) (6 << ((n % 8) * 4))
+#define PIN_AFIO_AF7(n) (7 << ((n % 8) * 4))
+#define PIN_AFIO_AF8(n) (8 << ((n % 8) * 4))
+#define PIN_AFIO_AF9(n) (9 << ((n % 8) * 4))
+#define PIN_AFIO_AF10(n) (10 << ((n % 8) * 4))
+#define PIN_AFIO_AF11(n) (11 << ((n % 8) * 4))
+#define PIN_AFIO_AF12(n) (12 << ((n % 8) * 4))
+#define PIN_AFIO_AF13(n) (13 << ((n % 8) * 4))
+#define PIN_AFIO_AF14(n) (14 << ((n % 8) * 4))
+#define PIN_AFIO_AF15(n) (15 << ((n % 8) * 4))
/*
* Port A setup.
@@ -89,6 +105,8 @@
PIN_PUDR_FLOATING(14) | \
PIN_PUDR_FLOATING(15)))
#define VAL_GPIOA_ODR 0xFFFFFFFF
+#define VAL_GPIOA_AFRL 0x00000000
+#define VAL_GPIOA_AFRH 0x00000000
/*
* Port B setup.
@@ -109,6 +127,8 @@
PIN_PUDR_FLOATING(GPIOB_LED4) | \
PIN_PUDR_FLOATING(GPIOB_LED3)))
#define VAL_GPIOB_ODR 0xFFFFFF3F
+#define VAL_GPIOB_AFRL 0x00000000
+#define VAL_GPIOB_AFRH 0x00000000
/*
* Port C setup.
@@ -122,6 +142,8 @@
#define VAL_GPIOC_PUPDR (~(PIN_PUDR_FLOATING(15) | \
PIN_PUDR_FLOATING(14)))
#define VAL_GPIOC_ODR 0xFFFFFFFF
+#define VAL_GPIOC_AFRL 0x00000000
+#define VAL_GPIOC_AFRH 0x00000000
/*
* Port D setup.
@@ -132,6 +154,8 @@
#define VAL_GPIOD_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOD_PUPDR 0xFFFFFFFF
#define VAL_GPIOD_ODR 0xFFFFFFFF
+#define VAL_GPIOD_AFRL 0x00000000
+#define VAL_GPIOD_AFRH 0x00000000
/*
* Port E setup.
@@ -142,6 +166,8 @@
#define VAL_GPIOE_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOE_PUPDR 0xFFFFFFFF
#define VAL_GPIOE_ODR 0xFFFFFFFF
+#define VAL_GPIOE_AFRL 0x00000000
+#define VAL_GPIOE_AFRH 0x00000000
/*
* Port H setup.
@@ -152,6 +178,8 @@
#define VAL_GPIOH_OSPEEDR 0xFFFFFFFF
#define VAL_GPIOH_PUPDR 0xFFFFFFFF
#define VAL_GPIOH_ODR 0xFFFFFFFF
+#define VAL_GPIOH_AFRL 0x00000000
+#define VAL_GPIOH_AFRH 0x00000000
#if !defined(_FROM_ASM_)
#ifdef __cplusplus