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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-13 09:41:55 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-11-13 09:41:55 +0000 |
| commit | 11c89928eac9e2a9916940b8f634f3d96b60f17e (patch) | |
| tree | 3af58998e293808620f1253aeaca169ce50d5347 /boards | |
| parent | be60d348aa1f67e1c9a4667aa996318c1a43067f (diff) | |
| download | ChibiOS-11c89928eac9e2a9916940b8f634f3d96b60f17e.tar.gz ChibiOS-11c89928eac9e2a9916940b8f634f3d96b60f17e.tar.bz2 ChibiOS-11c89928eac9e2a9916940b8f634f3d96b60f17e.zip | |
STM8L Demo and PAL driver working now.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2357 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'boards')
| -rw-r--r-- | boards/ST_STM8L_DISCOVERY/board.c | 6 | ||||
| -rw-r--r-- | boards/ST_STM8L_DISCOVERY/board.h | 17 |
2 files changed, 18 insertions, 5 deletions
diff --git a/boards/ST_STM8L_DISCOVERY/board.c b/boards/ST_STM8L_DISCOVERY/board.c index dd4a27472..8a013fa26 100644 --- a/boards/ST_STM8L_DISCOVERY/board.c +++ b/boards/ST_STM8L_DISCOVERY/board.c @@ -39,13 +39,13 @@ void hwinit(void) { /*
* TIM2 initialization as system tick.
*/
- CLK->PCKENR1 |= 32; /* PCKEN15, TIM2 clock source.*/
+ CLK->PCKENR1 |= CLK_PCKENR1_TIM2;
TIM2->PSCR = 4; /* Prescaler divide by 2^4=16.*/
TIM2->ARRH = (uint8_t)(TIM2_ARR >> 8);
TIM2->ARRL = (uint8_t)(TIM2_ARR);
TIM2->CNTRH = 0;
TIM2->CNTRL = 0;
TIM2->SR1 = 0;
- TIM2->IER = 1; /* UIE */
- TIM2->CR1 = 1; /* CEN */
+ TIM2->IER = TIM_IER_UIE;
+ TIM2->CR1 = TIM_CR1_CEN;
}
diff --git a/boards/ST_STM8L_DISCOVERY/board.h b/boards/ST_STM8L_DISCOVERY/board.h index a349aa9e4..3355c28c9 100644 --- a/boards/ST_STM8L_DISCOVERY/board.h +++ b/boards/ST_STM8L_DISCOVERY/board.h @@ -116,7 +116,7 @@ * Port C initial setup.
*/
#define VAL_GPIOCODR 0
-#define VAL_GPIOCDDR (1 < PC_LED4)
+#define VAL_GPIOCDDR (1 << PC_LED4)
#define VAL_GPIOCCR1 0xFF /* All pull-up/push-pull. */
#define VAL_GPIOCCR2 0
@@ -132,7 +132,7 @@ * Port E initial setup.
*/
#define VAL_GPIOEODR 0
-#define VAL_GPIOEDDR (1 < PE_LED3)
+#define VAL_GPIOEDDR (1 << PE_LED3)
#define VAL_GPIOECR1 0xFF /* All pull-up/push-pull. */
#define VAL_GPIOECR2 0
@@ -144,6 +144,19 @@ #define VAL_GPIOFCR1 0xFF /* All pull-up/push-pull. */
#define VAL_GPIOFCR2 0
+/*
+ * TIM2-update ISR segment code. This code is injected into the appropriate
+ * ISR by the HAL.
+ */
+#define _TIM2_UPDATE_ISR() { \
+ if (TIM2->SR1 & TIM_SR1_UIF) { \
+ chSysLockFromIsr(); \
+ chSysTimerHandlerI(); \
+ chSysUnlockFromIsr(); \
+ TIM2->SR1 = 0; \
+ } \
+}
+
#ifdef __cplusplus
extern "C" {
#endif
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