Ports setup PAL support for STM32.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1048 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 12 insertions, 13 deletions

diff --git a/demos/ARMCM3-STM32F103-GCC/board.c b/demos/ARMCM3-STM32F103-GCC/board.c
index 52701992a..3e3776f4a 100644
--- a/demos/ARMCM3-STM32F103-GCC/board.c
+++ b/demos/ARMCM3-STM32F103-GCC/board.c
@@ -25,6 +25,17 @@
 #include "stm32_serial.h"

 

 /*

+ * Digital I/O ports static configuration as defined in @p board.h.

+ */

+static const STM32GPIOConfig config =

+{

+ {VAL_GPIOAODR, VAL_GPIOACRL, VAL_GPIOACRH},

+ {VAL_GPIOBODR, VAL_GPIOBCRL, VAL_GPIOBCRH},

+ {VAL_GPIOCODR, VAL_GPIOCCRL, VAL_GPIOCCRH},

+ {VAL_GPIODODR, VAL_GPIODCRL, VAL_GPIODCRH},

+};

+

+/*

  * Early initialization code.

  * This initialization is performed just after reset before BSS and DATA

  * segments initialization.

@@ -62,19 +73,7 @@ void hwinit0(void) {
   /*

    * I/O ports initialization as specified in board.h.

    */

-  palInit();

-

-  pal_lld_stm32_setup(IOPORT_A, VAL_GPIOACRH, VAL_GPIOACRL);

-  palWritePort(IOPORT_A, VAL_GPIOAODR);

-

-  pal_lld_stm32_setup(IOPORT_B, VAL_GPIOBCRH, VAL_GPIOBCRL);

-  palWritePort(IOPORT_B, VAL_GPIOBODR);

-

-  pal_lld_stm32_setup(IOPORT_C, VAL_GPIOCCRH, VAL_GPIOCCRL);

-  palWritePort(IOPORT_C, VAL_GPIOCODR);

-

-  pal_lld_stm32_setup(IOPORT_D, VAL_GPIODCRH, VAL_GPIODCRL);

-  palWritePort(IOPORT_D, VAL_GPIODODR);

+  palInit(&config);

 }

 

 /*