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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-13 13:07:43 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-13 13:07:43 +0000 |
| commit | 3670cd18fa9d58ee18e0b0f5ef23bde587c63fd0 (patch) | |
| tree | ae6d6df8228b3e25bae5775f38b3fd92979d37e0 /demos/PPC-SPC564A-GCC/mcuconf.h | |
| parent | 68c2e740e88734e275daa219ff786fc221a456f9 (diff) | |
| download | ChibiOS-3670cd18fa9d58ee18e0b0f5ef23bde587c63fd0.tar.gz ChibiOS-3670cd18fa9d58ee18e0b0f5ef23bde587c63fd0.tar.bz2 ChibiOS-3670cd18fa9d58ee18e0b0f5ef23bde587c63fd0.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5423 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos/PPC-SPC564A-GCC/mcuconf.h')
| -rw-r--r-- | demos/PPC-SPC564A-GCC/mcuconf.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/demos/PPC-SPC564A-GCC/mcuconf.h b/demos/PPC-SPC564A-GCC/mcuconf.h new file mode 100644 index 000000000..e759030f2 --- /dev/null +++ b/demos/PPC-SPC564A-GCC/mcuconf.h @@ -0,0 +1,64 @@ +/*
+ * Licensed under ST Liberty SW License Agreement V2, (the "License");
+ * You may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at:
+ *
+ * http://www.st.com/software_license_agreement_liberty_v2
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/*
+ * SPC563Mxx drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the whole
+ * driver is enabled in halconf.h.
+ *
+ * IRQ priorities:
+ * 1...15 Lowest...Highest.
+ */
+
+#define SPC564Axx_MCUCONF
+
+/*
+ * HAL driver system settings.
+ */
+#define SPC5_NO_INIT FALSE
+#define SPC5_CLK_BYPASS FALSE
+#define SPC5_ALLOW_OVERCLOCK FALSE
+#define SPC5_CLK_PREDIV_VALUE 2
+#define SPC5_CLK_MFD_VALUE 150
+#define SPC5_CLK_RFD SPC5_RFD_DIV4
+#define SPC5_FLASH_BIUCR (BIUCR_BANK1_TOO | \
+ BIUCR_MASTER4_PREFETCH | \
+ BIUCR_MASTER0_PREFETCH | \
+ BIUCR_DPFEN | \
+ BIUCR_IPFEN | \
+ BIUCR_PFLIM_ON_MISS | \
+ BIUCR_BFEN)
+
+/*
+ * ADC driver settings.
+ */
+#define SPC5_ADC_USE_ADC0_Q0 FALSE
+#define SPC5_ADC_USE_ADC0_Q1 FALSE
+#define SPC5_ADC_USE_ADC0_Q2 FALSE
+#define SPC5_ADC_USE_ADC1_Q3 FALSE
+#define SPC5_ADC_USE_ADC1_Q4 FALSE
+#define SPC5_ADC_USE_ADC1_Q5 FALSE
+#define SPC5_ADC_CR_CLK_PS ADC_CR_CLK_PS(5)
+
+/*
+ * SERIAL driver system settings.
+ */
+#define SPC5_USE_ESCIA TRUE
+#define SPC5_USE_ESCIB TRUE
+#define SPC5_USE_ESCIC TRUE
+#define SPC5_ESCIA_PRIORITY 8
+#define SPC5_ESCIB_PRIORITY 8
+#define SPC5_ESCIC_PRIORITY 8
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