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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-12-17 07:41:10 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-12-17 07:41:10 +0000 |
| commit | af25622db89ab50b7bad608792b1cb5a42b900c5 (patch) | |
| tree | bf5fd69cf108be36930c8cb361059b70ed09d334 /demos | |
| parent | 968d0cf6e9e8f362021e4288cd3336fe7922e00e (diff) | |
| download | ChibiOS-af25622db89ab50b7bad608792b1cb5a42b900c5.tar.gz ChibiOS-af25622db89ab50b7bad608792b1cb5a42b900c5.tar.bz2 ChibiOS-af25622db89ab50b7bad608792b1cb5a42b900c5.zip | |
Fixed some forgotten details.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3621 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'demos')
| -rw-r--r-- | demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h | 31 |
1 files changed, 30 insertions, 1 deletions
diff --git a/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h index ae08b035d..d7c54a498 100644 --- a/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h +++ b/demos/ARMCM4-STM32F407-DISCOVERY/mcuconf.h @@ -37,6 +37,8 @@ */
#define STM32_NO_INIT FALSE
#define STM32_VOS STM32_VOS_HIGH
+#define STM32_PLS STM32_PLS_LEV0
+#define STM32_PVD_ENABLE TRUE
#define STM32_HSI_ENABLED TRUE
#define STM32_LSI_ENABLED TRUE
#define STM32_HSE_ENABLED TRUE
@@ -96,9 +98,12 @@ #define STM32_EXT_EXTI5_9_IRQ_PRIORITY 6
#define STM32_EXT_EXTI10_15_IRQ_PRIORITY 6
#define STM32_EXT_EXTI16_IRQ_PRIORITY 6
-#define STM32_EXT_EXTI17_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI17_IRQ_PRIORITY 15
#define STM32_EXT_EXTI18_IRQ_PRIORITY 6
#define STM32_EXT_EXTI19_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI20_IRQ_PRIORITY 6
+#define STM32_EXT_EXTI21_IRQ_PRIORITY 15
+#define STM32_EXT_EXTI22_IRQ_PRIORITY 15
/*
* GPT driver system settings.
@@ -204,3 +209,27 @@ #define STM32_UART_USART2_DMA_PRIORITY 0
#define STM32_UART_USART3_DMA_PRIORITY 0
#define STM32_UART_DMA_ERROR_HOOK(uartp) chSysHalt()
+
+
+/*
+ * I2C driver system settings.
+ */
+#define STM32_I2C_USE_I2C1 FALSE
+#define STM32_I2C_USE_I2C2 FALSE
+#define STM32_I2C_USE_I2C3 FALSE
+#define STM32_I2C_I2C1_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 0)
+#define STM32_I2C_I2C1_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 6)
+#define STM32_I2C_I2C2_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C2_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 7)
+#define STM32_I2C_I2C3_RX_DMA_STREAM STM32_DMA_STREAM_ID(1, 2)
+#define STM32_I2C_I2C3_TX_DMA_STREAM STM32_DMA_STREAM_ID(1, 4)
+#define STM32_I2C_I2C1_IRQ_PRIORITY 6
+#define STM32_I2C_I2C2_IRQ_PRIORITY 6
+#define STM32_I2C_I2C3_IRQ_PRIORITY 6
+#define STM32_I2C_I2C1_DMA_PRIORITY 1
+#define STM32_I2C_I2C2_DMA_PRIORITY 1
+#define STM32_I2C_I2C3_DMA_PRIORITY 1
+#define STM32_I2C_I2C1_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_I2C_I2C2_DMA_ERROR_HOOK() chSysHalt()
+#define STM32_I2C_I2C3_DMA_ERROR_HOOK() chSysHalt()
+
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