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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-05-07 08:11:03 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2014-05-07 08:11:03 +0000 |
| commit | bec915e05274a94f2b1a5e2443f04de826dd1f6e (patch) | |
| tree | cec2044911766f5dc5a7bd8b8c9ffe0fe81734f8 /os/hal/boards/OLIMEX_AVR_CAN/board.c | |
| parent | 4afa0b98dff9eac6a94c104acf900e15147d2da3 (diff) | |
| parent | b43c71424d201583822b26d13d11f7e3634cb515 (diff) | |
| download | ChibiOS-bec915e05274a94f2b1a5e2443f04de826dd1f6e.tar.gz ChibiOS-bec915e05274a94f2b1a5e2443f04de826dd1f6e.tar.bz2 ChibiOS-bec915e05274a94f2b1a5e2443f04de826dd1f6e.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6916 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/boards/OLIMEX_AVR_CAN/board.c')
| -rw-r--r-- | os/hal/boards/OLIMEX_AVR_CAN/board.c | 89 |
1 files changed, 89 insertions, 0 deletions
diff --git a/os/hal/boards/OLIMEX_AVR_CAN/board.c b/os/hal/boards/OLIMEX_AVR_CAN/board.c new file mode 100644 index 000000000..9d379b08d --- /dev/null +++ b/os/hal/boards/OLIMEX_AVR_CAN/board.c @@ -0,0 +1,89 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "hal.h"
+
+/**
+ * @brief PAL setup.
+ * @details Digital I/O ports static configuration as defined in @p board.h.
+ * This variable is used by the HAL when initializing the PAL driver.
+ */
+#if HAL_USE_PAL || defined(__DOXYGEN__)
+const PALConfig pal_default_config =
+{
+#if defined(PORTA)
+ {VAL_PORTA, VAL_DDRA},
+#endif
+#if defined(PORTB)
+ {VAL_PORTB, VAL_DDRB},
+#endif
+#if defined(PORTC)
+ {VAL_PORTC, VAL_DDRC},
+#endif
+#if defined(PORTD)
+ {VAL_PORTD, VAL_DDRD},
+#endif
+#if defined(PORTE)
+ {VAL_PORTE, VAL_DDRE},
+#endif
+#if defined(PORTF)
+ {VAL_PORTF, VAL_DDRF},
+#endif
+#if defined(PORTG)
+ {VAL_PORTG, VAL_DDRG},
+#endif
+};
+#endif /* HAL_USE_PAL */
+
+CH_IRQ_HANDLER(TIMER0_COMP_vect) {
+
+ CH_IRQ_PROLOGUE();
+
+ chSysLockFromIsr();
+ chSysTimerHandlerI();
+ chSysUnlockFromIsr();
+
+ CH_IRQ_EPILOGUE();
+}
+
+/*
+ * Board-specific initialization code.
+ */
+void boardInit(void) {
+
+ /*
+ * External interrupts setup, all disabled initially.
+ */
+ EICRA = 0x00;
+ EICRB = 0x00;
+ EIMSK = 0x00;
+
+ /*
+ * Enables Idle mode for SLEEP instruction.
+ */
+ SMCR = (1 << SE);
+
+ /*
+ * Timer 0 setup.
+ */
+ TCCR0A = (1 << WGM01) | (0 << WGM00) | /* CTC mode. */
+ (0 << COM0A1) | (0 << COM0A0) | /* OC0A disabled. */
+ (0 << CS02) | (1 << CS01) | (1 << CS00); /* CLK/64 clock. */
+ OCR0A = F_CPU / 64 / CH_FREQUENCY - 1;
+ TCNT0 = 0; /* Reset counter. */
+ TIFR0 = (1 << OCF0A); /* Reset pending. */
+ TIMSK0 = (1 << OCIE0A); /* IRQ on compare. */
+}
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