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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-07-26 06:17:10 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-07-26 06:17:10 +0000 |
| commit | c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c (patch) | |
| tree | 53c0ebd122fe369cc08b4ed3bf885ba39e9a07f1 /os/hal/boards | |
| parent | b05e7e8c4464bda8fecd21ff80086a34edf9292c (diff) | |
| download | ChibiOS-c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c.tar.gz ChibiOS-c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c.tar.bz2 ChibiOS-c96f0b2bbf7c911a5d23d6c9920f1c6f4d766c8c.zip | |
More STM32L0xx support files.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8104 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/boards')
| -rw-r--r-- | os/hal/boards/ST_NUCLEO_L053R8/board.h | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/os/hal/boards/ST_NUCLEO_L053R8/board.h b/os/hal/boards/ST_NUCLEO_L053R8/board.h index 736bcaec3..d97ac925f 100644 --- a/os/hal/boards/ST_NUCLEO_L053R8/board.h +++ b/os/hal/boards/ST_NUCLEO_L053R8/board.h @@ -30,12 +30,14 @@ /*
* Board oscillators-related settings.
- * NOTE: HSE not fitted.
+ * NOTE: LSE and HSE not fitted.
*/
#if !defined(STM32_LSECLK)
#define STM32_LSECLK 0U
#endif
+#define STM32_LSEDRV (0U << 11U)
+
#if !defined(STM32_HSECLK)
#define STM32_HSECLK 0U
#endif
@@ -239,8 +241,8 @@ PIN_MODE_INPUT(GPIOA_PIN8) | \
PIN_MODE_INPUT(GPIOA_PIN9) | \
PIN_MODE_INPUT(GPIOA_PIN10) | \
- PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DM) | \
- PIN_MODE_ALTERNATE(GPIOA_OTG_FS_DP) | \
+ PIN_MODE_INPUT(GPIOA_OTG_FS_DM) | \
+ PIN_MODE_INPUT(GPIOA_OTG_FS_DP) | \
PIN_MODE_ALTERNATE(GPIOA_SWDIO) | \
PIN_MODE_ALTERNATE(GPIOA_SWCLK) | \
PIN_MODE_INPUT(GPIOA_PIN15))
@@ -310,8 +312,8 @@ PIN_ODR_HIGH(GPIOA_PIN15))
#define VAL_GPIOA_AFRL (PIN_AFIO_AF(GPIOA_PIN0, 0) | \
PIN_AFIO_AF(GPIOA_PIN1, 0) | \
- PIN_AFIO_AF(GPIOA_USART_TX, 7) | \
- PIN_AFIO_AF(GPIOA_USART_RX, 7) | \
+ PIN_AFIO_AF(GPIOA_USART_TX, 4) | \
+ PIN_AFIO_AF(GPIOA_USART_RX, 4) | \
PIN_AFIO_AF(GPIOA_PIN4, 0) | \
PIN_AFIO_AF(GPIOA_LED_GREEN, 0) | \
PIN_AFIO_AF(GPIOA_PIN6, 0) | \
@@ -319,8 +321,8 @@ #define VAL_GPIOA_AFRH (PIN_AFIO_AF(GPIOA_PIN8, 0) | \
PIN_AFIO_AF(GPIOA_PIN9, 0) | \
PIN_AFIO_AF(GPIOA_PIN10, 0) | \
- PIN_AFIO_AF(GPIOA_OTG_FS_DM, 10) | \
- PIN_AFIO_AF(GPIOA_OTG_FS_DP, 10) | \
+ PIN_AFIO_AF(GPIOA_OTG_FS_DM, 0) | \
+ PIN_AFIO_AF(GPIOA_OTG_FS_DP, 0) | \
PIN_AFIO_AF(GPIOA_SWDIO, 0) | \
PIN_AFIO_AF(GPIOA_SWCLK, 0) | \
PIN_AFIO_AF(GPIOA_PIN15, 0))
|