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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-11-29 13:37:19 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2009-11-29 13:37:19 +0000 |
| commit | 937efbc9b64d9ac5c10136e8d1e4fb359a6bdda6 (patch) | |
| tree | c4bdb12be1bd62a663e6046c1b7ef995c3199a9d /os/hal/platforms/AT91SAM7/hal_lld.c | |
| parent | 03933a5925ac71e4662d6152fad2237377a532cd (diff) | |
| download | ChibiOS-937efbc9b64d9ac5c10136e8d1e4fb359a6bdda6.tar.gz ChibiOS-937efbc9b64d9ac5c10136e8d1e4fb359a6bdda6.tar.bz2 ChibiOS-937efbc9b64d9ac5c10136e8d1e4fb359a6bdda6.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1357 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/AT91SAM7/hal_lld.c')
| -rw-r--r-- | os/hal/platforms/AT91SAM7/hal_lld.c | 125 |
1 files changed, 125 insertions, 0 deletions
diff --git a/os/hal/platforms/AT91SAM7/hal_lld.c b/os/hal/platforms/AT91SAM7/hal_lld.c new file mode 100644 index 000000000..7c788ca9e --- /dev/null +++ b/os/hal/platforms/AT91SAM7/hal_lld.c @@ -0,0 +1,125 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2007 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+/**
+ * @file AT91SAM7/hal_lld.c
+ * @brief AT91SAM7 HAL subsystem low level driver source
+ * @addtogroup AT91SAM7_HAL
+ * @{
+ */
+
+#include "ch.h"
+#include "hal.h"
+
+/*===========================================================================*/
+/* Low Level Driver exported variables. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Low Level Driver local variables. */
+/*===========================================================================*/
+
+/*
+ * Digital I/O ports static configuration as defined in @p board.h.
+ */
+const AT91SAM7PIOConfig pal_default_config =
+{
+ {VAL_PIOA_ODSR, VAL_PIOA_OSR, VAL_PIOA_PUSR},
+#if (SAM7_PLATFORM == SAM7X128) || (SAM7_PLATFORM == SAM7X256) || \
+ (SAM7_PLATFORM == SAM7X512)
+ {VAL_PIOB_ODSR, VAL_PIOB_OSR, VAL_PIOB_PUSR}
+#endif
+};
+
+/*===========================================================================*/
+/* Low Level Driver local functions. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Low Level Driver interrupt handlers. */
+/*===========================================================================*/
+
+static CH_IRQ_HANDLER(spurious_handler) {
+
+ CH_IRQ_PROLOGUE();
+
+ AT91SAM7_SPURIOUS_HANDLER_HOOK();
+
+ AT91C_BASE_AIC->AIC_EOICR = 0;
+
+ CH_IRQ_EPILOGUE();
+}
+
+/*===========================================================================*/
+/* Low Level Driver exported functions. */
+/*===========================================================================*/
+
+/**
+ * @brief Low level HAL driver initialization.
+ */
+void hal_lld_init(void) {
+ unsigned i;
+
+ /* FIQ Handler weak symbol defined in vectors.s.*/
+ void FiqHandler(void);
+
+ /* Default AIC setup, the device drivers will modify it as needed.*/
+ AT91C_BASE_AIC->AIC_ICCR = 0xFFFFFFFF;
+ AT91C_BASE_AIC->AIC_IDCR = 0xFFFFFFFF;
+ AT91C_BASE_AIC->AIC_SVR[0] = (AT91_REG)FiqHandler;
+ for (i = 1; i < 31; i++) {
+ AT91C_BASE_AIC->AIC_SVR[i] = (AT91_REG)NULL;
+ AT91C_BASE_AIC->AIC_EOICR = (AT91_REG)i;
+ }
+ AT91C_BASE_AIC->AIC_SPU = (AT91_REG)spurious_handler;
+
+}
+
+/**
+ * @brief AT91SAM7 clocks and PLL initialization.
+ * @note All the involved constants come from the file @p board.h.
+ */
+void at91sam7_clock_init(void) {
+
+ /* Flash Memory: 1 wait state, about 50 cycles in a microsecond.*/
+ AT91C_BASE_MC->MC_FMR = (AT91C_MC_FMCN & (50 << 16)) | AT91C_MC_FWS_1FWS;
+
+ /* Watchdog disabled.*/
+ AT91C_BASE_WDTC->WDTC_WDMR = AT91C_WDTC_WDDIS;
+
+ /* Enables the main oscillator and waits 56 slow cycles as startup time.*/
+ AT91C_BASE_PMC->PMC_MOR = (AT91C_CKGR_OSCOUNT & (7 << 8)) | AT91C_CKGR_MOSCEN;
+ while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MOSCS))
+ ;
+
+ /* PLL setup: DIV = 14, MUL = 72, PLLCOUNT = 10
+ PLLfreq = 96109714 Hz (rounded).*/
+ AT91C_BASE_PMC->PMC_PLLR = (AT91C_CKGR_DIV & 14) |
+ (AT91C_CKGR_PLLCOUNT & (10 << 8)) |
+ (AT91C_CKGR_MUL & (72 << 16));
+ while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_LOCK))
+ ;
+
+ /* Master clock = PLLfreq / 2 = 48054858 Hz (rounded).*/
+ AT91C_BASE_PMC->PMC_MCKR = AT91C_PMC_CSS_PLL_CLK | AT91C_PMC_PRES_CLK_2;
+ while (!(AT91C_BASE_PMC->PMC_SR & AT91C_PMC_MCKRDY))
+ ;
+}
+
+/** @} */
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