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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-15 15:58:20 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-15 15:58:20 +0000 |
| commit | 7c68ef157d009f9932ac47ba21ba5d74e321623f (patch) | |
| tree | 6c2442ca44cd090656ec3059ffb959f3d747e18d /os/hal/platforms/LPC13xx/system_LPC13xx.h | |
| parent | 076746af63d317f8e96766b9137a65679f60463f (diff) | |
| parent | e0d850113610f3efa0c0ac4946901f683e5e7332 (diff) | |
| download | ChibiOS-7c68ef157d009f9932ac47ba21ba5d74e321623f.tar.gz ChibiOS-7c68ef157d009f9932ac47ba21ba5d74e321623f.tar.bz2 ChibiOS-7c68ef157d009f9932ac47ba21ba5d74e321623f.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@5854 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/LPC13xx/system_LPC13xx.h')
| -rw-r--r-- | os/hal/platforms/LPC13xx/system_LPC13xx.h | 64 |
1 files changed, 64 insertions, 0 deletions
diff --git a/os/hal/platforms/LPC13xx/system_LPC13xx.h b/os/hal/platforms/LPC13xx/system_LPC13xx.h new file mode 100644 index 000000000..812f12365 --- /dev/null +++ b/os/hal/platforms/LPC13xx/system_LPC13xx.h @@ -0,0 +1,64 @@ +/**************************************************************************//**
+ * @file system_LPC13xx.h
+ * @brief CMSIS Cortex-M3 Device Peripheral Access Layer Header File
+ * for the NXP LPC13xx Device Series
+ * @version V1.10
+ * @date 24. November 2010
+ *
+ * @note
+ * Copyright (C) 2009-2010 ARM Limited. All rights reserved.
+ *
+ * @par
+ * ARM Limited (ARM) is supplying this software for use with Cortex-M
+ * processor based microcontrollers. This file can be freely distributed
+ * within development tools that are supporting such ARM based processors.
+ *
+ * @par
+ * THIS SOFTWARE IS PROVIDED "AS IS". NO WARRANTIES, WHETHER EXPRESS, IMPLIED
+ * OR STATUTORY, INCLUDING, BUT NOT LIMITED TO, IMPLIED WARRANTIES OF
+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE APPLY TO THIS SOFTWARE.
+ * ARM SHALL NOT, IN ANY CIRCUMSTANCES, BE LIABLE FOR SPECIAL, INCIDENTAL, OR
+ * CONSEQUENTIAL DAMAGES, FOR ANY REASON WHATSOEVER.
+ *
+ ******************************************************************************/
+
+
+#ifndef __SYSTEM_LPC13xx_H
+#define __SYSTEM_LPC13xx_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#include <stdint.h>
+
+extern uint32_t SystemCoreClock; /*!< System Clock Frequency (Core Clock) */
+
+
+/**
+ * Initialize the system
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Setup the microcontroller system.
+ * Initialize the System and update the SystemCoreClock variable.
+ */
+extern void SystemInit (void);
+
+/**
+ * Update SystemCoreClock variable
+ *
+ * @param none
+ * @return none
+ *
+ * @brief Updates the SystemCoreClock with current core Clock
+ * retrieved from cpu registers.
+ */
+extern void SystemCoreClockUpdate (void);
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* __SYSTEM_LPC13xx_H */
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