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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-05-14 06:43:02 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-05-14 06:43:02 +0000 |
| commit | 55b7744199ce9771ac761fc708d173bc487145e8 (patch) | |
| tree | 3b7a61cd3019849544e2bbe25ace9ff658a75e75 /os/hal/platforms/STM32/hal_lld.c | |
| parent | fee72530476c5b9eed43fde792df9de367d56800 (diff) | |
| download | ChibiOS-55b7744199ce9771ac761fc708d173bc487145e8.tar.gz ChibiOS-55b7744199ce9771ac761fc708d173bc487145e8.tar.bz2 ChibiOS-55b7744199ce9771ac761fc708d173bc487145e8.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1916 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/hal_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/hal_lld.c | 9 |
1 files changed, 8 insertions, 1 deletions
diff --git a/os/hal/platforms/STM32/hal_lld.c b/os/hal/platforms/STM32/hal_lld.c index 9dc66a3f0..25d4b4d57 100644 --- a/os/hal/platforms/STM32/hal_lld.c +++ b/os/hal/platforms/STM32/hal_lld.c @@ -126,7 +126,7 @@ void stm32_clock_init(void) { #endif
/* Clock settings.*/
- RCC->CFGR = STM32_PLLMUL | STM32_PLLXTPRE | STM32_PLLSRC |
+ RCC->CFGR = STM32_MCO | STM32_PLLMUL | STM32_PLLXTPRE | STM32_PLLSRC |
STM32_ADCPRE | STM32_PPRE2 | STM32_PPRE1 | STM32_HPRE;
/* Flash setup and final clock selection. */
@@ -184,6 +184,13 @@ void stm32_clock_init(void) { ; /* Waits until PLL2 is stable. */
#endif
+ /* Clock settings.*/
+ RCC->CFGR = STM32_MCO | STM32_PLLMUL | STM32_PLLSRC |
+ STM32_ADCPRE | STM32_PPRE2 | STM32_PPRE1 | STM32_HPRE;
+
+ /* Flash setup and final clock selection. */
+ FLASH->ACR = STM32_FLASHBITS; /* Flash wait states depending on clock. */
+
/* Switching on the configured clock source if it is different from HSI.*/
#if (STM32_SW != STM32_SW_HSI)
RCC->CFGR |= STM32_SW; /* Switches on the selected clock source. */
|