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authorgdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-10-04 17:16:18 +0000
committergdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4>2010-10-04 17:16:18 +0000
commit2891f7d645c4be187ac96ee4011207531d25c34a (patch)
treeddfb8134c4c918893cb0cb50075bd5be3f4248a9 /os/hal/platforms/STM32/stm32_dma.h
parent7f61cb948ccdbd728643e0f174ee87542d9a862d (diff)
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Documentation improvements, fixed a small error in the STM32 serial driver.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2234 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/stm32_dma.h')
-rw-r--r--os/hal/platforms/STM32/stm32_dma.h16
1 files changed, 16 insertions, 0 deletions
diff --git a/os/hal/platforms/STM32/stm32_dma.h b/os/hal/platforms/STM32/stm32_dma.h
index 226ec9b7f..20873116e 100644
--- a/os/hal/platforms/STM32/stm32_dma.h
+++ b/os/hal/platforms/STM32/stm32_dma.h
@@ -130,6 +130,8 @@ typedef struct {
*
* @param[in] dmachp dmachp to a stm32_dma_channel_t structure
* @param[in] cpar value to be written in the CPAR register
+ *
+ * @api
*/
#define dmaChannelSetPeripheral(dmachp, cpar) { \
(dmachp)->CPAR = (uint32_t)(cpar); \
@@ -145,6 +147,8 @@ typedef struct {
* @param[in] cndtr value to be written in the CNDTR register
* @param[in] cmar value to be written in the CMAR register
* @param[in] ccr value to be written in the CCR register
+ *
+ * @api
*/
#define dmaChannelSetup(dmachp, cndtr, cmar, ccr) { \
(dmachp)->CNDTR = (uint32_t)(cndtr); \
@@ -156,6 +160,8 @@ typedef struct {
* @brief DMA channel enable by channel pointer.
*
* @param[in] dmachp dmachp to a stm32_dma_channel_t structure
+ *
+ * @api
*/
#define dmaChannelEnable(dmachp) { \
(dmachp)->CCR |= DMA_CCR1_EN; \
@@ -166,6 +172,8 @@ typedef struct {
* @brief DMA channel disable by channel pointer.
*
* @param[in] dmachp dmachp to a stm32_dma_channel_t structure
+ *
+ * @api
*/
#define dmaChannelDisable(dmachp) { \
(dmachp)->CCR = 0; \
@@ -184,6 +192,8 @@ typedef struct {
* @param[in] cndtr value to be written in the CNDTR register
* @param[in] cmar value to be written in the CMAR register
* @param[in] ccr value to be written in the CCR register
+ *
+ * @api
*/
#define dmaSetupChannel(dmap, ch, cndtr, cmar, ccr) { \
dmaChannelSetup(&(dmap)->channels[ch], (cndtr), (cmar), (ccr)); \
@@ -196,6 +206,8 @@ typedef struct {
*
* @param[in] dmap pointer to a stm32_dma_t structure
* @param[in] ch channel number
+ *
+ * @api
*/
#define dmaEnableChannel(dmap, ch) { \
dmaChannelEnable(&(dmap)->channels[ch]); \
@@ -208,6 +220,8 @@ typedef struct {
*
* @param[in] dmap pointer to a stm32_dma_t structure
* @param[in] ch channel number
+ *
+ * @api
*/
#define dmaDisableChannel(dmap, ch) { \
dmaChannelDisable(&(dmap)->channels[ch]); \
@@ -222,6 +236,8 @@ typedef struct {
*
* @param[in] dmap pointer to a stm32_dma_t structure
* @param[in] ch channel number
+ *
+ * @api
*/
#define dmaClearChannel(dmap, ch){ \
(dmap)->IFCR = 1 << ((ch) * 4); \