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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-07-27 10:31:19 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-07-27 10:31:19 +0000 |
| commit | 79b97b0f60aa6d99667a6bb4d402c420cb6d856e (patch) | |
| tree | 4943d621333fe3ec88d921d90deb4925bd362be9 /os/hal/platforms/STM32/stm32_dma.h | |
| parent | b91f48eb105c753ef877752f8dde2c6bbbfea36e (diff) | |
| download | ChibiOS-79b97b0f60aa6d99667a6bb4d402c420cb6d856e.tar.gz ChibiOS-79b97b0f60aa6d99667a6bb4d402c420cb6d856e.tar.bz2 ChibiOS-79b97b0f60aa6d99667a6bb4d402c420cb6d856e.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2094 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/stm32_dma.h')
| -rw-r--r-- | os/hal/platforms/STM32/stm32_dma.h | 29 |
1 files changed, 26 insertions, 3 deletions
diff --git a/os/hal/platforms/STM32/stm32_dma.h b/os/hal/platforms/STM32/stm32_dma.h index dba85711e..94e863d31 100644 --- a/os/hal/platforms/STM32/stm32_dma.h +++ b/os/hal/platforms/STM32/stm32_dma.h @@ -131,7 +131,13 @@ typedef struct { * value does not change frequently, it usually points to a peripheral
* data register.
* @note Channels are numbered from 0 to 6, use the appropriate macro
- * as parameter. + * as parameter.
+ *
+ * @param[in] dmap pointer to a stm32_dma_t structure
+ * @param[in] ch channel number
+ * @param[in] cntdr value to be written in the CNDTR register
+ * @param[in] cmar value to be written in the CMAR register
+ * @param[in] ccr value to be written in the CCR register
*/
#define dmaSetupChannel(dmap, ch, cndtr, cmar, ccr) { \
stm32_dma_channel_t *dmachp = &dmap->channels[ch]; \
@@ -142,11 +148,28 @@ typedef struct { /**
* @brief DMA channel disable.
- * @note Channel's pending interrupts are cleared. + * @note Channels are numbered from 0 to 6, use the appropriate macro
+ * as parameter.
+ *
+ * @param[in] dmap pointer to a stm32_dma_t structure
+ * @param[in] ch channel number
*/
#define dmaDisableChannel(dmap, ch) { \
(dmap)->channels[ch].CCR = 0; \
- (dmap)->IFCR = 0xF << (ch); \
+}
+
+/**
+ * @brief DMA channel interrupt sources clear.
+ * @details Sets the appropriate CGIF bit into the IFCR register in order to
+ * withdraw all the pending interrupt bits from the ISR register.
+ * @note Channels are numbered from 0 to 6, use the appropriate macro
+ * as parameter.
+ *
+ * @param[in] dmap pointer to a stm32_dma_t structure
+ * @param[in] ch channel number
+ */
+#define dmaClearChannel(dmap, ch){ \
+ (dmap)->IFCR = 1 << (ch); \
}
/*===========================================================================*/
|