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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-07-27 08:36:01 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2010-07-27 08:36:01 +0000 |
| commit | b91f48eb105c753ef877752f8dde2c6bbbfea36e (patch) | |
| tree | f7ac373d01f3a223c35edfd6e145b5a96a744aba /os/hal/platforms/STM32/uart_lld.c | |
| parent | 5b4d534a2ce1add25b4b7e8ae3b5d97cead680cd (diff) | |
| download | ChibiOS-b91f48eb105c753ef877752f8dde2c6bbbfea36e.tar.gz ChibiOS-b91f48eb105c753ef877752f8dde2c6bbbfea36e.tar.bz2 ChibiOS-b91f48eb105c753ef877752f8dde2c6bbbfea36e.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@2093 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32/uart_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32/uart_lld.c | 53 |
1 files changed, 37 insertions, 16 deletions
diff --git a/os/hal/platforms/STM32/uart_lld.c b/os/hal/platforms/STM32/uart_lld.c index f5db41c58..73088a454 100644 --- a/os/hal/platforms/STM32/uart_lld.c +++ b/os/hal/platforms/STM32/uart_lld.c @@ -47,22 +47,6 @@ UARTDriver UARTD1; /* Driver local functions. */
/*===========================================================================*/
-#define dma_setup(dmap, cndtr, cmar, ccr) { \
- (dmap)->CNDTR = (uint32_t)(cndtr); \
- (dmap)->CMAR = (uint32_t)(cmar); \
- (dmap)->CCR = (uint32_t)(ccr); \
-}
-
-#define dma_disable(dmap) { \
- (dmap)->CCR = 0; \
-}
-
-#define dma_rx_setup(uartp, cndtr, cmar, ccr) \
- dma_setup((uartp)->ud_dmarx, (cndtr), (cmar), (uartp)->ud_dmaccr|(ccr))
-
-#define dma_tx_setup(uartp, cndtr, cmar, ccr) { \
- dma_setup((uartp)->ud_dmatx, (cndtr), (cmar), (uartp)->ud_dmaccr|(ccr))
-
/**
* @brief USART initialization.
* @details This function must be invoked with interrupts disabled.
@@ -120,6 +104,43 @@ static void usart_stop(UARTDriver *uartp) { /* Driver interrupt handlers. */
/*===========================================================================*/
+#if STM32_UART_USE_USART1 || defined(__DOXYGEN__)
+/**
+ * @brief USART1 RX DMA interrupt handler (channel 4).
+ */
+CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
+
+ CH_IRQ_PROLOGUE();
+
+ DMA1->IFCR |= DMA_IFCR_CGIF4 | DMA_IFCR_CTCIF4 |
+ DMA_IFCR_CHTIF4 | DMA_IFCR_CTEIF4;
+
+ CH_IRQ_EPILOGUE();
+}
+
+/**
+ * @brief USART1 TX DMA interrupt handler (channel 5).
+ */
+CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
+
+ CH_IRQ_PROLOGUE();
+
+ DMA1->IFCR |= DMA_IFCR_CGIF5 | DMA_IFCR_CTCIF5 |
+ DMA_IFCR_CHTIF5 | DMA_IFCR_CTEIF5;
+
+ CH_IRQ_EPILOGUE();
+}
+
+CH_IRQ_HANDLER(USART2_IRQHandler) {
+
+ CH_IRQ_PROLOGUE();
+
+ serve_interrupt(&SD2);
+
+ CH_IRQ_EPILOGUE();
+}
+#endif
+
/*===========================================================================*/
/* Driver exported functions. */
/*===========================================================================*/
|