git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3758 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 422 insertions, 422 deletions

diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h
index d566e31fd..1112d2901 100644
--- a/os/hal/platforms/STM32/i2c_lld.h
+++ b/os/hal/platforms/STM32/i2c_lld.h
@@ -1,422 +1,422 @@
-/*
-    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
-                 2011 Giovanni Di Sirio.
-
-    This file is part of ChibiOS/RT.
-
-    ChibiOS/RT is free software; you can redistribute it and/or modify
-    it under the terms of the GNU General Public License as published by
-    the Free Software Foundation; either version 3 of the License, or
-    (at your option) any later version.
-
-    ChibiOS/RT is distributed in the hope that it will be useful,
-    but WITHOUT ANY WARRANTY; without even the implied warranty of
-    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
-    GNU General Public License for more details.
-
-    You should have received a copy of the GNU General Public License
-    along with this program.  If not, see <http://www.gnu.org/licenses/>.
-*/
-/*
-   Concepts and parts of this file have been contributed by Uladzimir Pylinsky
-   aka barthess.
- */
-
-/**
- * @file    STM32/i2c_lld.h
- * @brief   STM32 I2C subsystem low level driver header.
- *
- * @addtogroup I2C
- * @{
- */
-
-#ifndef _I2C_LLD_H_
-#define _I2C_LLD_H_
-
-#if HAL_USE_I2C || defined(__DOXYGEN__)
-
-/*===========================================================================*/
-/* Driver constants.                                                         */
-/*===========================================================================*/
-
-/**
- * @brief   Peripheral clock frequency.
- */
-#define I2C_CLK_FREQ  ((STM32_PCLK1) / 1000000)
-
-/*===========================================================================*/
-/* Driver pre-compile time settings.                                         */
-/*===========================================================================*/
-
-/**
- * @name    Configuration options
- * @{
- */
-/**
- * @brief   I2C1 driver enable switch.
- * @details If set to @p TRUE the support for I2C1 is included.
- * @note    The default is @p FALSE.
- */
-#if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__)
-#define STM32_I2C_USE_I2C1              FALSE
-#endif
-
-/**
- * @brief   I2C2 driver enable switch.
- * @details If set to @p TRUE the support for I2C2 is included.
- * @note    The default is @p FALSE.
- */
-#if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__)
-#define STM32_I2C_USE_I2C2              FALSE
-#endif
-
-/**
- * @brief   I2C3 driver enable switch.
- * @details If set to @p TRUE the support for I2C3 is included.
- * @note    The default is @p FALSE.
- */
-#if !defined(STM32_I2C_USE_I2C3) || defined(__DOXYGEN__)
-#define STM32_I2C_USE_I2C3              FALSE
-#endif
-
-/**
- * @brief   I2C1 interrupt priority level setting.
- */
-#if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C1_IRQ_PRIORITY     10
-#endif
-
-/**
- * @brief   I2C2 interrupt priority level setting.
- */
-#if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C2_IRQ_PRIORITY     10
-#endif
-
-/**
- * @brief   I2C3 interrupt priority level setting.
- */
-#if !defined(STM32_I2C_I2C3_IRQ_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C3_IRQ_PRIORITY     10
-#endif
-
-/**
- * @brief   I2C1 DMA error hook.
- * @note    The default action for DMA errors is a system halt because DMA
- *          error can only happen because programming errors.
- */
-#if !defined(STM32_I2C_DMA_ERROR_HOOK) || defined(__DOXYGEN__)
-#define STM32_I2C_DMA_ERROR_HOOK(i2cp)  chSysHalt()
-#endif
-
-#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)
-
-/**
- * @brief   DMA stream used for I2C1 RX operations.
- * @note    This option is only available on platforms with enhanced DMA.
- */
-#if !defined(STM32_I2C_I2C1_RX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 0)
-#endif
-
-/**
- * @brief   DMA stream used for I2C1 TX operations.
- * @note    This option is only available on platforms with enhanced DMA.
- */
-#if !defined(STM32_I2C_I2C1_TX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
-#endif
-
-/**
- * @brief   DMA stream used for I2C2 RX operations.
- * @note    This option is only available on platforms with enhanced DMA.
- */
-#if !defined(STM32_I2C_I2C2_RX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)
-#endif
-
-/**
- * @brief   DMA stream used for I2C2 TX operations.
- * @note    This option is only available on platforms with enhanced DMA.
- */
-#if !defined(STM32_I2C_I2C2_TX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 7)
-#endif
-
-/**
- * @brief   DMA stream used for I2C3 RX operations.
- * @note    This option is only available on platforms with enhanced DMA.
- */
-#if !defined(STM32_I2C_I2C3_RX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)
-#endif
-
-/**
- * @brief   DMA stream used for I2C3 TX operations.
- * @note    This option is only available on platforms with enhanced DMA.
- */
-#if !defined(STM32_I2C_I2C3_TX_DMA_STREAM) || defined(__DOXYGEN__)
-#define STM32_I2C_I2C3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4)
-#endif
-
-#else /* !STM32_ADVANCED_DMA */
-
-/* Fixed streams for platforms using the old DMA peripheral, the values are
-   valid for both STM32F1xx and STM32L1xx.*/
-#define STM32_I2C_I2C1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 7)
-#define STM32_I2C_I2C1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)
-#define STM32_I2C_I2C2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)
-#define STM32_I2C_I2C2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4)
-
-#endif /* !STM32_ADVANCED_DMA*/
-/** @} */
-
-/*===========================================================================*/
-/* Derived constants and error checks.                                       */
-/*===========================================================================*/
-
-/** @brief  error checks */
-#if STM32_I2C_USE_I2C1 && !STM32_HAS_I2C1
-#error "I2C1 not present in the selected device"
-#endif
-
-#if STM32_I2C_USE_I2C2 && !STM32_HAS_I2C2
-#error "I2C2 not present in the selected device"
-#endif
-
-#if STM32_I2C_USE_I2C3 && !STM32_HAS_I2C3
-#error "I2C3 not present in the selected device"
-#endif
-
-#if !STM32_I2C_USE_I2C1 && !STM32_I2C_USE_I2C2 &&                           \
-    !STM32_I2C_USE_I2C3
-#error "I2C driver activated but no I2C peripheral assigned"
-#endif
-
-#if STM32_I2C_USE_I2C1 &&                                                   \
-    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_RX_DMA_STREAM,                    \
-                           STM32_I2C1_RX_DMA_MSK)
-#error "invalid DMA stream associated to I2C1 RX"
-#endif
-
-#if STM32_I2C_USE_I2C1 &&                                                   \
-    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_TX_DMA_STREAM,                    \
-                           STM32_I2C1_TX_DMA_MSK)
-#error "invalid DMA stream associated to I2C1 TX"
-#endif
-
-#if STM32_I2C_USE_I2C2 &&                                                   \
-    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_RX_DMA_STREAM,                    \
-                           STM32_I2C2_RX_DMA_MSK)
-#error "invalid DMA stream associated to I2C2 RX"
-#endif
-
-#if STM32_I2C_USE_I2C2 &&                                                   \
-    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_TX_DMA_STREAM,                    \
-                           STM32_I2C2_TX_DMA_MSK)
-#error "invalid DMA stream associated to I2C2 TX"
-#endif
-
-#if STM32_I2C_USE_I2C3 &&                                                   \
-    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_RX_DMA_STREAM,                    \
-                           STM32_I2C3_RX_DMA_MSK)
-#error "invalid DMA stream associated to I2C3 RX"
-#endif
-
-#if STM32_I2C_USE_I2C3 &&                                                   \
-    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_TX_DMA_STREAM,                    \
-                           STM32_I2C3_TX_DMA_MSK)
-#error "invalid DMA stream associated to I2C3 TX"
-#endif
-
-#if !defined(STM32_DMA_REQUIRED)
-#define STM32_DMA_REQUIRED
-#endif
-
-/* Check clock range. */
-#if defined(STM32F4XX)
-#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 42)
-#error "I2C peripheral clock frequency out of range."
-#endif
-
-#elif defined(STM32L1XX_MD)
-#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 32)
-#error "I2C peripheral clock frequency out of range."
-#endif
-
-#elif defined(STM32F2XX)
-#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 30)
-#error "I2C peripheral clock frequency out of range."
-#endif
-
-#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \
-      defined(STM32F10X_HD_VL)
-#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 24)
-#error "I2C peripheral clock frequency out of range."
-#endif
-
-#elif defined(STM32F10X_LD) || defined(STM32F10X_MD) ||                     \
-      defined(STM32F10X_HD) || defined(STM32F10X_XL) ||                     \
-      defined(STM32F10X_CL)
-#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 36)
-#error "I2C peripheral clock frequency out of range."
-#endif
-#else
-#error "unspecified, unsupported or invalid STM32 platform"
-#endif
-
-/*===========================================================================*/
-/* Driver data structures and types.                                         */
-/*===========================================================================*/
-
-/**
- * @brief   Type representing I2C address.
- */
-typedef uint16_t i2caddr_t;
-
-/**
- * @brief   I2C Driver condition flags type.
- */
-typedef uint32_t i2cflags_t;
-
-/**
- * @brief   Supported modes for the I2C bus.
- */
-typedef enum {
-  OPMODE_I2C = 1,
-  OPMODE_SMBUS_DEVICE = 2,
-  OPMODE_SMBUS_HOST = 3,
-} i2copmode_t;
-
-/**
- * @brief   Supported duty cycle modes for the I2C bus.
- */
-typedef enum {
-  STD_DUTY_CYCLE = 1,
-  FAST_DUTY_CYCLE_2 = 2,
-  FAST_DUTY_CYCLE_16_9 = 3,
-} i2cdutycycle_t;
-
-/**
- * @brief Driver configuration structure.
- */
-typedef struct {
-  i2copmode_t     op_mode;       /**< @brief Specifies the I2C mode.        */
-  uint32_t        clock_speed;   /**< @brief Specifies the clock frequency.
-                                      @note Must be set to a value lower
-                                      than 400kHz.                          */
-  i2cdutycycle_t  duty_cycle;    /**< @brief Specifies the I2C fast mode
-                                      duty cycle.                           */
-} I2CConfig;
-
-/**
- * @brief   Type of a structure representing an I2C driver.
- */
-typedef struct I2CDriver I2CDriver;
-
-/**
- * @brief Structure representing an I2C driver.
- */
-struct I2CDriver{
-  /**
-   * @brief   Driver state.
-   */
-  i2cstate_t                state;
-  /**
-   * @brief   Current configuration data.
-   */
-  const I2CConfig           *config;
-  /**
-   * @brief   Error flags.
-   */
-  i2cflags_t                errors;
-#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)
-#if CH_USE_MUTEXES || defined(__DOXYGEN__)
-  /**
-   * @brief   Mutex protecting the bus.
-   */
-  Mutex                     mutex;
-#elif CH_USE_SEMAPHORES
-  Semaphore                 semaphore;
-#endif
-#endif /* I2C_USE_MUTUAL_EXCLUSION */
-  /* End of the mandatory fields.*/
-  /**
-   * @brief   Thread waiting for I/O completion.
-   */
-  Thread                    *thread;
-  /**
-   * @brief     Current slave address without R/W bit.
-   */
-  i2caddr_t                 addr;
-  /**
-   * @brief     DMA mode bit mask.
-   */
-  uint32_t                  dmamode;
-  /**
-   * @brief     Receive DMA channel.
-   */
-  const stm32_dma_stream_t  *dmarx;
-  /**
-   * @brief     Transmit DMA channel.
-   */
-  const stm32_dma_stream_t  *dmatx;
-  /**
-   * @brief     Pointer to the I2Cx registers block.
-   */
-  I2C_TypeDef               *i2c;
-};
-
-/*===========================================================================*/
-/* Driver macros.                                                            */
-/*===========================================================================*/
-
-/**
- * @brief   Get errors from I2C driver.
- *
- * @param[in] i2cp      pointer to the @p I2CDriver object
- *
- * @notapi
- */
-#define i2c_lld_get_errors(i2cp) ((i2cp)->errors)
-
-/*===========================================================================*/
-/* External declarations.                                                    */
-/*===========================================================================*/
-
-#if !defined(__DOXYGEN__)
-#if STM32_I2C_USE_I2C1
-extern I2CDriver I2CD1;
-#endif
-
-#if STM32_I2C_USE_I2C2
-extern I2CDriver I2CD2;
-#endif
-
-#if STM32_I2C_USE_I2C3
-extern I2CDriver I2CD3;
-#endif
-#endif /* !defined(__DOXYGEN__) */
-
-#ifdef __cplusplus
-extern "C" {
-#endif
-  void i2c_lld_init(void);
-  void i2c_lld_start(I2CDriver *i2cp);
-  void i2c_lld_stop(I2CDriver *i2cp);
-  msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,
-                                        const uint8_t *txbuf, size_t txbytes,
-                                        uint8_t *rxbuf, size_t rxbytes,
-                                        systime_t timeout);
-  msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,
-                                       uint8_t *rxbuf, size_t rxbytes,
-                                       systime_t timeout);
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* HAL_USE_I2C  */
-
-#endif /* _I2C_LLD_H_ */
-
-/** @} */
+/*

+    ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,

+                 2011 Giovanni Di Sirio.

+

+    This file is part of ChibiOS/RT.

+

+    ChibiOS/RT is free software; you can redistribute it and/or modify

+    it under the terms of the GNU General Public License as published by

+    the Free Software Foundation; either version 3 of the License, or

+    (at your option) any later version.

+

+    ChibiOS/RT is distributed in the hope that it will be useful,

+    but WITHOUT ANY WARRANTY; without even the implied warranty of

+    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the

+    GNU General Public License for more details.

+

+    You should have received a copy of the GNU General Public License

+    along with this program.  If not, see <http://www.gnu.org/licenses/>.

+*/

+/*

+   Concepts and parts of this file have been contributed by Uladzimir Pylinsky

+   aka barthess.

+ */

+

+/**

+ * @file    STM32/i2c_lld.h

+ * @brief   STM32 I2C subsystem low level driver header.

+ *

+ * @addtogroup I2C

+ * @{

+ */

+

+#ifndef _I2C_LLD_H_

+#define _I2C_LLD_H_

+

+#if HAL_USE_I2C || defined(__DOXYGEN__)

+

+/*===========================================================================*/

+/* Driver constants.                                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Peripheral clock frequency.

+ */

+#define I2C_CLK_FREQ  ((STM32_PCLK1) / 1000000)

+

+/*===========================================================================*/

+/* Driver pre-compile time settings.                                         */

+/*===========================================================================*/

+

+/**

+ * @name    Configuration options

+ * @{

+ */

+/**

+ * @brief   I2C1 driver enable switch.

+ * @details If set to @p TRUE the support for I2C1 is included.

+ * @note    The default is @p FALSE.

+ */

+#if !defined(STM32_I2C_USE_I2C1) || defined(__DOXYGEN__)

+#define STM32_I2C_USE_I2C1              FALSE

+#endif

+

+/**

+ * @brief   I2C2 driver enable switch.

+ * @details If set to @p TRUE the support for I2C2 is included.

+ * @note    The default is @p FALSE.

+ */

+#if !defined(STM32_I2C_USE_I2C2) || defined(__DOXYGEN__)

+#define STM32_I2C_USE_I2C2              FALSE

+#endif

+

+/**

+ * @brief   I2C3 driver enable switch.

+ * @details If set to @p TRUE the support for I2C3 is included.

+ * @note    The default is @p FALSE.

+ */

+#if !defined(STM32_I2C_USE_I2C3) || defined(__DOXYGEN__)

+#define STM32_I2C_USE_I2C3              FALSE

+#endif

+

+/**

+ * @brief   I2C1 interrupt priority level setting.

+ */

+#if !defined(STM32_I2C_I2C1_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C1_IRQ_PRIORITY     10

+#endif

+

+/**

+ * @brief   I2C2 interrupt priority level setting.

+ */

+#if !defined(STM32_I2C_I2C2_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C2_IRQ_PRIORITY     10

+#endif

+

+/**

+ * @brief   I2C3 interrupt priority level setting.

+ */

+#if !defined(STM32_I2C_I2C3_IRQ_PRIORITY) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C3_IRQ_PRIORITY     10

+#endif

+

+/**

+ * @brief   I2C1 DMA error hook.

+ * @note    The default action for DMA errors is a system halt because DMA

+ *          error can only happen because programming errors.

+ */

+#if !defined(STM32_I2C_DMA_ERROR_HOOK) || defined(__DOXYGEN__)

+#define STM32_I2C_DMA_ERROR_HOOK(i2cp)  chSysHalt()

+#endif

+

+#if STM32_ADVANCED_DMA || defined(__DOXYGEN__)

+

+/**

+ * @brief   DMA stream used for I2C1 RX operations.

+ * @note    This option is only available on platforms with enhanced DMA.

+ */

+#if !defined(STM32_I2C_I2C1_RX_DMA_STREAM) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 0)

+#endif

+

+/**

+ * @brief   DMA stream used for I2C1 TX operations.

+ * @note    This option is only available on platforms with enhanced DMA.

+ */

+#if !defined(STM32_I2C_I2C1_TX_DMA_STREAM) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

+#endif

+

+/**

+ * @brief   DMA stream used for I2C2 RX operations.

+ * @note    This option is only available on platforms with enhanced DMA.

+ */

+#if !defined(STM32_I2C_I2C2_RX_DMA_STREAM) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)

+#endif

+

+/**

+ * @brief   DMA stream used for I2C2 TX operations.

+ * @note    This option is only available on platforms with enhanced DMA.

+ */

+#if !defined(STM32_I2C_I2C2_TX_DMA_STREAM) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 7)

+#endif

+

+/**

+ * @brief   DMA stream used for I2C3 RX operations.

+ * @note    This option is only available on platforms with enhanced DMA.

+ */

+#if !defined(STM32_I2C_I2C3_RX_DMA_STREAM) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C3_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 2)

+#endif

+

+/**

+ * @brief   DMA stream used for I2C3 TX operations.

+ * @note    This option is only available on platforms with enhanced DMA.

+ */

+#if !defined(STM32_I2C_I2C3_TX_DMA_STREAM) || defined(__DOXYGEN__)

+#define STM32_I2C_I2C3_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4)

+#endif

+

+#else /* !STM32_ADVANCED_DMA */

+

+/* Fixed streams for platforms using the old DMA peripheral, the values are

+   valid for both STM32F1xx and STM32L1xx.*/

+#define STM32_I2C_I2C1_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 7)

+#define STM32_I2C_I2C1_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 6)

+#define STM32_I2C_I2C2_RX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 5)

+#define STM32_I2C_I2C2_TX_DMA_STREAM     STM32_DMA_STREAM_ID(1, 4)

+

+#endif /* !STM32_ADVANCED_DMA*/

+/** @} */

+

+/*===========================================================================*/

+/* Derived constants and error checks.                                       */

+/*===========================================================================*/

+

+/** @brief  error checks */

+#if STM32_I2C_USE_I2C1 && !STM32_HAS_I2C1

+#error "I2C1 not present in the selected device"

+#endif

+

+#if STM32_I2C_USE_I2C2 && !STM32_HAS_I2C2

+#error "I2C2 not present in the selected device"

+#endif

+

+#if STM32_I2C_USE_I2C3 && !STM32_HAS_I2C3

+#error "I2C3 not present in the selected device"

+#endif

+

+#if !STM32_I2C_USE_I2C1 && !STM32_I2C_USE_I2C2 &&                           \

+    !STM32_I2C_USE_I2C3

+#error "I2C driver activated but no I2C peripheral assigned"

+#endif

+

+#if STM32_I2C_USE_I2C1 &&                                                   \

+    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_RX_DMA_STREAM,                    \

+                           STM32_I2C1_RX_DMA_MSK)

+#error "invalid DMA stream associated to I2C1 RX"

+#endif

+

+#if STM32_I2C_USE_I2C1 &&                                                   \

+    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C1_TX_DMA_STREAM,                    \

+                           STM32_I2C1_TX_DMA_MSK)

+#error "invalid DMA stream associated to I2C1 TX"

+#endif

+

+#if STM32_I2C_USE_I2C2 &&                                                   \

+    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_RX_DMA_STREAM,                    \

+                           STM32_I2C2_RX_DMA_MSK)

+#error "invalid DMA stream associated to I2C2 RX"

+#endif

+

+#if STM32_I2C_USE_I2C2 &&                                                   \

+    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C2_TX_DMA_STREAM,                    \

+                           STM32_I2C2_TX_DMA_MSK)

+#error "invalid DMA stream associated to I2C2 TX"

+#endif

+

+#if STM32_I2C_USE_I2C3 &&                                                   \

+    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_RX_DMA_STREAM,                    \

+                           STM32_I2C3_RX_DMA_MSK)

+#error "invalid DMA stream associated to I2C3 RX"

+#endif

+

+#if STM32_I2C_USE_I2C3 &&                                                   \

+    !STM32_DMA_IS_VALID_ID(STM32_I2C_I2C3_TX_DMA_STREAM,                    \

+                           STM32_I2C3_TX_DMA_MSK)

+#error "invalid DMA stream associated to I2C3 TX"

+#endif

+

+#if !defined(STM32_DMA_REQUIRED)

+#define STM32_DMA_REQUIRED

+#endif

+

+/* Check clock range. */

+#if defined(STM32F4XX)

+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 42)

+#error "I2C peripheral clock frequency out of range."

+#endif

+

+#elif defined(STM32L1XX_MD)

+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 32)

+#error "I2C peripheral clock frequency out of range."

+#endif

+

+#elif defined(STM32F2XX)

+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 30)

+#error "I2C peripheral clock frequency out of range."

+#endif

+

+#elif defined(STM32F10X_LD_VL) || defined(STM32F10X_MD_VL) ||               \

+      defined(STM32F10X_HD_VL)

+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 24)

+#error "I2C peripheral clock frequency out of range."

+#endif

+

+#elif defined(STM32F10X_LD) || defined(STM32F10X_MD) ||                     \

+      defined(STM32F10X_HD) || defined(STM32F10X_XL) ||                     \

+      defined(STM32F10X_CL)

+#if !(I2C_CLK_FREQ >= 2) && (I2C_CLK_FREQ <= 36)

+#error "I2C peripheral clock frequency out of range."

+#endif

+#else

+#error "unspecified, unsupported or invalid STM32 platform"

+#endif

+

+/*===========================================================================*/

+/* Driver data structures and types.                                         */

+/*===========================================================================*/

+

+/**

+ * @brief   Type representing I2C address.

+ */

+typedef uint16_t i2caddr_t;

+

+/**

+ * @brief   I2C Driver condition flags type.

+ */

+typedef uint32_t i2cflags_t;

+

+/**

+ * @brief   Supported modes for the I2C bus.

+ */

+typedef enum {

+  OPMODE_I2C = 1,

+  OPMODE_SMBUS_DEVICE = 2,

+  OPMODE_SMBUS_HOST = 3,

+} i2copmode_t;

+

+/**

+ * @brief   Supported duty cycle modes for the I2C bus.

+ */

+typedef enum {

+  STD_DUTY_CYCLE = 1,

+  FAST_DUTY_CYCLE_2 = 2,

+  FAST_DUTY_CYCLE_16_9 = 3,

+} i2cdutycycle_t;

+

+/**

+ * @brief Driver configuration structure.

+ */

+typedef struct {

+  i2copmode_t     op_mode;       /**< @brief Specifies the I2C mode.        */

+  uint32_t        clock_speed;   /**< @brief Specifies the clock frequency.

+                                      @note Must be set to a value lower

+                                      than 400kHz.                          */

+  i2cdutycycle_t  duty_cycle;    /**< @brief Specifies the I2C fast mode

+                                      duty cycle.                           */

+} I2CConfig;

+

+/**

+ * @brief   Type of a structure representing an I2C driver.

+ */

+typedef struct I2CDriver I2CDriver;

+

+/**

+ * @brief Structure representing an I2C driver.

+ */

+struct I2CDriver{

+  /**

+   * @brief   Driver state.

+   */

+  i2cstate_t                state;

+  /**

+   * @brief   Current configuration data.

+   */

+  const I2CConfig           *config;

+  /**

+   * @brief   Error flags.

+   */

+  i2cflags_t                errors;

+#if I2C_USE_MUTUAL_EXCLUSION || defined(__DOXYGEN__)

+#if CH_USE_MUTEXES || defined(__DOXYGEN__)

+  /**

+   * @brief   Mutex protecting the bus.

+   */

+  Mutex                     mutex;

+#elif CH_USE_SEMAPHORES

+  Semaphore                 semaphore;

+#endif

+#endif /* I2C_USE_MUTUAL_EXCLUSION */

+  /* End of the mandatory fields.*/

+  /**

+   * @brief   Thread waiting for I/O completion.

+   */

+  Thread                    *thread;

+  /**

+   * @brief     Current slave address without R/W bit.

+   */

+  i2caddr_t                 addr;

+  /**

+   * @brief     DMA mode bit mask.

+   */

+  uint32_t                  dmamode;

+  /**

+   * @brief     Receive DMA channel.

+   */

+  const stm32_dma_stream_t  *dmarx;

+  /**

+   * @brief     Transmit DMA channel.

+   */

+  const stm32_dma_stream_t  *dmatx;

+  /**

+   * @brief     Pointer to the I2Cx registers block.

+   */

+  I2C_TypeDef               *i2c;

+};

+

+/*===========================================================================*/

+/* Driver macros.                                                            */

+/*===========================================================================*/

+

+/**

+ * @brief   Get errors from I2C driver.

+ *

+ * @param[in] i2cp      pointer to the @p I2CDriver object

+ *

+ * @notapi

+ */

+#define i2c_lld_get_errors(i2cp) ((i2cp)->errors)

+

+/*===========================================================================*/

+/* External declarations.                                                    */

+/*===========================================================================*/

+

+#if !defined(__DOXYGEN__)

+#if STM32_I2C_USE_I2C1

+extern I2CDriver I2CD1;

+#endif

+

+#if STM32_I2C_USE_I2C2

+extern I2CDriver I2CD2;

+#endif

+

+#if STM32_I2C_USE_I2C3

+extern I2CDriver I2CD3;

+#endif

+#endif /* !defined(__DOXYGEN__) */

+

+#ifdef __cplusplus

+extern "C" {

+#endif

+  void i2c_lld_init(void);

+  void i2c_lld_start(I2CDriver *i2cp);

+  void i2c_lld_stop(I2CDriver *i2cp);

+  msg_t i2c_lld_master_transmit_timeout(I2CDriver *i2cp, i2caddr_t addr,

+                                        const uint8_t *txbuf, size_t txbytes,

+                                        uint8_t *rxbuf, size_t rxbytes,

+                                        systime_t timeout);

+  msg_t i2c_lld_master_receive_timeout(I2CDriver *i2cp, i2caddr_t addr,

+                                       uint8_t *rxbuf, size_t rxbytes,

+                                       systime_t timeout);

+#ifdef __cplusplus

+}

+#endif

+

+#endif /* HAL_USE_I2C  */

+

+#endif /* _I2C_LLD_H_ */

+

+/** @} */