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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-11-12 10:05:38 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-11-12 10:05:38 +0000 |
| commit | 92c0a0e8514929e351d28e39bb157f61a63f0819 (patch) | |
| tree | 82ec666a00751ca05ceb20fe53e0667cbc832229 /os/hal/platforms/STM32F0xx/stm32_dma.c | |
| parent | 5715e53108e93192c32cbce64602e4e9ca20312b (diff) | |
| download | ChibiOS-92c0a0e8514929e351d28e39bb157f61a63f0819.tar.gz ChibiOS-92c0a0e8514929e351d28e39bb157f61a63f0819.tar.bz2 ChibiOS-92c0a0e8514929e351d28e39bb157f61a63f0819.zip | |
Fixed bug #439.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@6460 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F0xx/stm32_dma.c')
| -rw-r--r-- | os/hal/platforms/STM32F0xx/stm32_dma.c | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/os/hal/platforms/STM32F0xx/stm32_dma.c b/os/hal/platforms/STM32F0xx/stm32_dma.c index 2305d952d..167321730 100644 --- a/os/hal/platforms/STM32F0xx/stm32_dma.c +++ b/os/hal/platforms/STM32F0xx/stm32_dma.c @@ -115,7 +115,7 @@ CH_IRQ_HANDLER(Vector64) { CH_IRQ_PROLOGUE();
flags = (DMA1->ISR >> 0) & STM32_DMA_ISR_MASK;
- DMA1->IFCR = STM32_DMA_ISR_MASK << 0;
+ DMA1->IFCR = flags << 0;
if (dma_isr_redir[0].dma_func)
dma_isr_redir[0].dma_func(dma_isr_redir[0].dma_param, flags);
@@ -135,7 +135,7 @@ CH_IRQ_HANDLER(Vector68) { /* Check on channel 2.*/
flags = (DMA1->ISR >> 4) & STM32_DMA_ISR_MASK;
if (flags & STM32_DMA_ISR_MASK) {
- DMA1->IFCR = STM32_DMA_ISR_MASK << 4;
+ DMA1->IFCR = flags << 4;
if (dma_isr_redir[1].dma_func)
dma_isr_redir[1].dma_func(dma_isr_redir[1].dma_param, flags);
}
@@ -143,7 +143,7 @@ CH_IRQ_HANDLER(Vector68) { /* Check on channel 3.*/
flags = (DMA1->ISR >> 8) & STM32_DMA_ISR_MASK;
if (flags & STM32_DMA_ISR_MASK) {
- DMA1->IFCR = STM32_DMA_ISR_MASK << 8;
+ DMA1->IFCR = flags << 8;
if (dma_isr_redir[2].dma_func)
dma_isr_redir[2].dma_func(dma_isr_redir[2].dma_param, flags);
}
@@ -164,7 +164,7 @@ CH_IRQ_HANDLER(Vector6C) { /* Check on channel 4.*/
flags = (DMA1->ISR >> 12) & STM32_DMA_ISR_MASK;
if (flags & STM32_DMA_ISR_MASK) {
- DMA1->IFCR = STM32_DMA_ISR_MASK << 12;
+ DMA1->IFCR = flags << 12;
if (dma_isr_redir[3].dma_func)
dma_isr_redir[3].dma_func(dma_isr_redir[3].dma_param, flags);
}
@@ -172,7 +172,7 @@ CH_IRQ_HANDLER(Vector6C) { /* Check on channel 5.*/
flags = (DMA1->ISR >> 16) & STM32_DMA_ISR_MASK;
if (flags & STM32_DMA_ISR_MASK) {
- DMA1->IFCR = STM32_DMA_ISR_MASK << 16;
+ DMA1->IFCR = flags << 16;
if (dma_isr_redir[4].dma_func)
dma_isr_redir[4].dma_func(dma_isr_redir[4].dma_param, flags);
}
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