RTC for F4x branch.

git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/rtc_dev@3585 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 19 insertions, 19 deletions

diff --git a/os/hal/platforms/STM32F1xx/adc_lld.c b/os/hal/platforms/STM32F1xx/adc_lld.c
index 52d43daa9..84b194c0f 100644
--- a/os/hal/platforms/STM32F1xx/adc_lld.c
+++ b/os/hal/platforms/STM32F1xx/adc_lld.c
@@ -19,8 +19,8 @@
 */

 

 /**

- * @file    STM32/adc_lld.c

- * @brief   STM32 ADC subsystem low level driver source.

+ * @file    STM32F1xx/adc_lld.c

+ * @brief   STM32F1xx ADC subsystem low level driver source.

  *

  * @addtogroup ADC

  * @{

@@ -57,20 +57,20 @@ ADCDriver ADCD1;
 static void adc_lld_serve_rx_interrupt(ADCDriver *adcp, uint32_t flags) {

 

   /* DMA errors handling.*/

-#if defined(STM32_ADC_DMA_ERROR_HOOK)

   if ((flags & STM32_DMA_ISR_TEIF) != 0) {

-    STM32_ADC_DMA_ERROR_HOOK(spip);

+    /* DMA, this could help only if the DMA tries to access an unmapped

+       address space or violates alignment rules.*/

+    _adc_isr_error_code(adcp, ADC_ERR_DMAFAILURE);

   }

-#else

-  (void)flags;

-#endif

-  if ((flags & STM32_DMA_ISR_HTIF) != 0) {

-    /* Half transfer processing.*/

-    _adc_isr_half_code(adcp);

-  }

-  if ((flags & STM32_DMA_ISR_TCIF) != 0) {

-    /* Transfer complete processing.*/

-    _adc_isr_full_code(adcp);

+  else {

+    if ((flags & STM32_DMA_ISR_HTIF) != 0) {

+      /* Half transfer processing.*/

+      _adc_isr_half_code(adcp);

+    }

+    if ((flags & STM32_DMA_ISR_TCIF) != 0) {

+      /* Transfer complete processing.*/

+      _adc_isr_full_code(adcp);

+    }

   }

 }

 

@@ -100,7 +100,7 @@ void adc_lld_init(void) {
                   STM32_DMA_CR_TEIE        | STM32_DMA_CR_EN;

 

   /* Temporary activation.*/

-  RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;

+  rccEnableADC1(FALSE);

   ADC1->CR1 = 0;

   ADC1->CR2 = ADC_CR2_ADON;

 

@@ -116,7 +116,7 @@ void adc_lld_init(void) {
 

   /* Return the ADC in low power mode.*/

   ADC1->CR2 = 0;

-  RCC->APB2ENR &= ~RCC_APB2ENR_ADC1EN;

+  rccDisableADC1(FALSE);

 #endif

 }

 

@@ -140,13 +140,13 @@ void adc_lld_start(ADCDriver *adcp) {
                             (void *)adcp);

       chDbgAssert(!b, "adc_lld_start(), #1", "stream already allocated");

       dmaStreamSetPeripheral(adcp->dmastp, &ADC1->DR);

-      RCC->APB2ENR |= RCC_APB2ENR_ADC1EN;

+      rccEnableADC1(FALSE);

     }

 #endif

 

     /* ADC setup, the calibration procedure has already been performed

        during initialization.*/

-    adcp->adc->CR1 = ADC_CR1_SCAN;

+    adcp->adc->CR1 = 0;

     adcp->adc->CR2 = 0;

   }

 }

@@ -167,7 +167,7 @@ void adc_lld_stop(ADCDriver *adcp) {
       ADC1->CR1 = 0;

       ADC1->CR2 = 0;

       dmaStreamRelease(adcp->dmastp);

-      RCC->APB2ENR &= ~RCC_APB2ENR_ADC1EN;

+      rccDisableADC1(FALSE);

     }

 #endif

   }