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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-17 08:46:51 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-03-17 08:46:51 +0000 |
| commit | 5f4fb7dff9a86a507a73e940cea3af7e776b7492 (patch) | |
| tree | 33681c506e782da7c6aecccae761f9cb6fbefa5b /os/hal/platforms/STM32F37x/adc_lld.c | |
| parent | 3fc18fd71fd1d3266b4c606db52e2404b7bc9d77 (diff) | |
| download | ChibiOS-5f4fb7dff9a86a507a73e940cea3af7e776b7492.tar.gz ChibiOS-5f4fb7dff9a86a507a73e940cea3af7e776b7492.tar.bz2 ChibiOS-5f4fb7dff9a86a507a73e940cea3af7e776b7492.zip | |
STM32F37x ADC related changes.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5446 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F37x/adc_lld.c')
| -rw-r--r-- | os/hal/platforms/STM32F37x/adc_lld.c | 26 |
1 files changed, 0 insertions, 26 deletions
diff --git a/os/hal/platforms/STM32F37x/adc_lld.c b/os/hal/platforms/STM32F37x/adc_lld.c index a416e1eb7..12a5f3c50 100644 --- a/os/hal/platforms/STM32F37x/adc_lld.c +++ b/os/hal/platforms/STM32F37x/adc_lld.c @@ -174,32 +174,6 @@ void adc_lld_init(void) { STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
#endif
-#if STM32_ADC_USE_ADC2
- /* Driver initialization.*/
- adcObjectInit(&ADCD2);
- ADCD2.adc = ADC2;
- ADCD2.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC2_DMA_STREAM);
- ADCD2.dmamode = STM32_DMA_CR_CHSEL(ADC2_DMA_CHANNEL) |
- STM32_DMA_CR_PL(STM32_ADC_ADC2_DMA_PRIORITY) |
- STM32_DMA_CR_DIR_P2M |
- STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
- STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
- STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
-#endif
-
-#if STM32_ADC_USE_ADC3
- /* Driver initialization.*/
- adcObjectInit(&ADCD3);
- ADCD3.adc = ADC3;
- ADCD3.dmastp = STM32_DMA_STREAM(STM32_ADC_ADC3_DMA_STREAM);
- ADCD3.dmamode = STM32_DMA_CR_CHSEL(ADC3_DMA_CHANNEL) |
- STM32_DMA_CR_PL(STM32_ADC_ADC3_DMA_PRIORITY) |
- STM32_DMA_CR_DIR_P2M |
- STM32_DMA_CR_MSIZE_HWORD | STM32_DMA_CR_PSIZE_HWORD |
- STM32_DMA_CR_MINC | STM32_DMA_CR_TCIE |
- STM32_DMA_CR_DMEIE | STM32_DMA_CR_TEIE;
-#endif
-
/* The shared vector is initialized on driver initialization and never
disabled.*/
nvicEnableVector(ADC1_IRQn, CORTEX_PRIORITY_MASK(STM32_ADC_IRQ_PRIORITY));
|