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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-11-10 17:54:41 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-11-10 17:54:41 +0000 |
| commit | ed26815f85668f5eedc6c28581e8900f037cbba1 (patch) | |
| tree | 994c72b0900174001db8a5ce1d76883e67c60298 /os/hal/platforms/STM32F4xx/stm32_rcc.h | |
| parent | b81fe69f7174006176e505ac66aff44eb8e246f2 (diff) | |
| download | ChibiOS-ed26815f85668f5eedc6c28581e8900f037cbba1.tar.gz ChibiOS-ed26815f85668f5eedc6c28581e8900f037cbba1.tar.bz2 ChibiOS-ed26815f85668f5eedc6c28581e8900f037cbba1.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@3481 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM32F4xx/stm32_rcc.h')
| -rw-r--r-- | os/hal/platforms/STM32F4xx/stm32_rcc.h | 13 |
1 files changed, 6 insertions, 7 deletions
diff --git a/os/hal/platforms/STM32F4xx/stm32_rcc.h b/os/hal/platforms/STM32F4xx/stm32_rcc.h index 3a10e57b2..4971a71c5 100644 --- a/os/hal/platforms/STM32F4xx/stm32_rcc.h +++ b/os/hal/platforms/STM32F4xx/stm32_rcc.h @@ -27,7 +27,6 @@ * @addtogroup STM32F4xx_RCC
* @{
*/
-
#ifndef _STM32_RCC_
#define _STM32_RCC_
@@ -347,7 +346,7 @@ *
* @api
*/
-#define rccEnableDMA1(lp) rccEnableAHB(RCC_AHB1ENR_DMA1EN, lp)
+#define rccEnableDMA1(lp) rccEnableAHB1(RCC_AHB1ENR_DMA1EN, lp)
/**
* @brief Disables the DMA1 peripheral clock.
@@ -356,14 +355,14 @@ *
* @api
*/
-#define rccDisableDMA1(lp) rccDisableAHB(RCC_AHB1ENR_DMA1EN, lp)
+#define rccDisableDMA1(lp) rccDisableAHB1(RCC_AHB1ENR_DMA1EN, lp)
/**
* @brief Resets the DMA1 peripheral.
*
* @api
*/
-#define rccResetDMA1() rccResetAHB(RCC_AHB1RSTR_DMA1RST)
+#define rccResetDMA1() rccResetAHB1(RCC_AHB1RSTR_DMA1RST)
/**
* @brief Enables the DMA2 peripheral clock.
@@ -372,7 +371,7 @@ *
* @api
*/
-#define rccEnableDMA2(lp) rccEnableAHB(RCC_AHB1ENR_DMA2EN, lp)
+#define rccEnableDMA2(lp) rccEnableAHB1(RCC_AHB1ENR_DMA2EN, lp)
/**
* @brief Disables the DMA2 peripheral clock.
@@ -381,14 +380,14 @@ *
* @api
*/
-#define rccDisableDMA2(lp) rccDisableAHB(RCC_AHB1ENR_DMA2EN, lp)
+#define rccDisableDMA2(lp) rccDisableAHB1(RCC_AHB1ENR_DMA2EN, lp)
/**
* @brief Resets the DMA2 peripheral.
*
* @api
*/
-#define rccResetDMA2() rccResetAHB(RCC_AHB1RSTR_DMA2RST)
+#define rccResetDMA2() rccResetAHB1(RCC_AHB1RSTR_DMA2RST)
/** @} */
/**
|