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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-15 15:58:20 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-06-15 15:58:20 +0000 |
| commit | 7c68ef157d009f9932ac47ba21ba5d74e321623f (patch) | |
| tree | 6c2442ca44cd090656ec3059ffb959f3d747e18d /os/hal/platforms/STM8S/hal_lld.h | |
| parent | 076746af63d317f8e96766b9137a65679f60463f (diff) | |
| parent | e0d850113610f3efa0c0ac4946901f683e5e7332 (diff) | |
| download | ChibiOS-7c68ef157d009f9932ac47ba21ba5d74e321623f.tar.gz ChibiOS-7c68ef157d009f9932ac47ba21ba5d74e321623f.tar.bz2 ChibiOS-7c68ef157d009f9932ac47ba21ba5d74e321623f.zip | |
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/kernel_3_dev@5854 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'os/hal/platforms/STM8S/hal_lld.h')
| -rw-r--r-- | os/hal/platforms/STM8S/hal_lld.h | 222 |
1 files changed, 222 insertions, 0 deletions
diff --git a/os/hal/platforms/STM8S/hal_lld.h b/os/hal/platforms/STM8S/hal_lld.h new file mode 100644 index 000000000..0bf87ac01 --- /dev/null +++ b/os/hal/platforms/STM8S/hal_lld.h @@ -0,0 +1,222 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file STM8S/hal_lld.h
+ * @brief STM8S HAL subsystem low level driver source.
+ * @pre This module requires the following macros to be defined in the
+ * @p board.h file:
+ * - HSECLK (@p 0 if disabled or frequency in Hertz).
+ * .
+ * One of the following macros must also be defined:
+ * - STM8S103.
+ * - STM8S105.
+ * - STM8S207.
+ * - STM8S208.
+ * - STM8S903.
+ * .
+ *
+ * @addtogroup HAL
+ * @{
+ */
+
+#ifndef _HAL_LLD_H_
+#define _HAL_LLD_H_
+
+#undef FALSE
+#undef TRUE
+
+#if defined(STM8S208) || defined(STM8S207) || defined(STM8S105) || \
+ defined(STM8S103) || defined(STM8S903)
+#include "stm8s.h"
+#else
+#error "unsupported or invalid STM8 platform"
+#endif
+
+#define FALSE 0
+#define TRUE (!FALSE)
+
+/*===========================================================================*/
+/* Driver constants. */
+/*===========================================================================*/
+
+/**
+ * @brief Defines the support for realtime counters in the HAL.
+ */
+#define HAL_IMPLEMENTS_COUNTERS FALSE
+
+/**
+ * @brief Platform name.
+ */
+#define PLATFORM_NAME "STM8S"
+
+#define LSICLK 128000 /**< Low speed internal clock. */
+#define HSICLK 16000000 /**< High speed internal clock. */
+
+#define CLK_SYSSEL_HSI 0xE1 /**< HSI clock selector. */
+#define CLK_SYSSEL_LSI 0xD2 /**< LSI clock selector. */
+#define CLK_SYSSEL_HSE 0xB4 /**< HSE clock selector. */
+
+#define CLK_HSI_DIV1 0 /**< HSI clock divided by 1. */
+#define CLK_HSI_DIV2 1 /**< HSI clock divided by 2. */
+#define CLK_HSI_DIV4 2 /**< HSI clock divided by 4. */
+#define CLK_HSI_DIV8 3 /**< HSI clock divided by 8. */
+
+#define CLK_CPU_DIV1 0 /**< CPU clock divided by 1. */
+#define CLK_CPU_DIV2 1 /**< CPU clock divided by 2. */
+#define CLK_CPU_DIV4 2 /**< CPU clock divided by 4. */
+#define CLK_CPU_DIV8 3 /**< CPU clock divided by 8. */
+#define CLK_CPU_DIV16 4 /**< CPU clock divided by 16. */
+#define CLK_CPU_DIV32 5 /**< CPU clock divided by 32. */
+#define CLK_CPU_DIV64 6 /**< CPU clock divided by 64. */
+#define CLK_CPU_DIV128 7 /**< CPU clock divided by 128. */
+
+/*===========================================================================*/
+/* Driver pre-compile time settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Disables the clock initialization in the HAL.
+ */
+#if !defined(STM8S_NO_CLOCK_INIT) || defined(__DOXYGEN__)
+#define STM8S_NO_CLOCK_INIT FALSE
+#endif
+
+/**
+ * @brief Enables or disables the HSI clock source.
+ */
+#if !defined(STM8S_HSI_ENABLED) || defined(__DOXYGEN__)
+#define STM8S_HSI_ENABLED FALSE
+#endif
+
+/**
+ * @brief Enables or disables the LSI clock source.
+ */
+#if !defined(STM8S_LSI_ENABLED) || defined(__DOXYGEN__)
+#define STM8S_LSI_ENABLED TRUE
+#endif
+
+/**
+ * @brief Enables or disables the HSE clock source.
+ */
+#if !defined(STM8S_HSE_ENABLED) || defined(__DOXYGEN__)
+#define STM8S_HSE_ENABLED TRUE
+#endif
+
+/**
+ * @brief Clock source setting.
+ */
+#if !defined(STM8S_SYSCLK_SOURCE) || defined(__DOXYGEN__)
+#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSE
+#endif
+
+/**
+ * @brief HSI clock divider.
+ */
+#if !defined(STM8S_HSI_DIVIDER) || defined(__DOXYGEN__)
+#define STM8S_HSI_DIVIDER CLK_HSI_DIV8
+#endif
+
+/**
+ * @brief CPU clock divider.
+ */
+#if !defined(STM8S_CPU_DIVIDER) || defined(__DOXYGEN__)
+#define STM8S_CPU_DIVIDER CLK_CPU_DIV1
+#endif
+
+/*===========================================================================*/
+/* Derived constants and error checks. */
+/*===========================================================================*/
+
+#if (STM8S_HSI_DIVIDER != CLK_HSI_DIV1) && \
+ (STM8S_HSI_DIVIDER != CLK_HSI_DIV2) && \
+ (STM8S_HSI_DIVIDER != CLK_HSI_DIV4) && \
+ (STM8S_HSI_DIVIDER != CLK_HSI_DIV8)
+#error "specified invalid HSI divider"
+#endif
+
+#if (STM8S_CPU_DIVIDER != CLK_CPU_DIV1) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV2) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV4) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV8) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV16) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV32) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV64) && \
+ (STM8S_CPU_DIVIDER != CLK_CPU_DIV128)
+#error "specified invalid CPU divider"
+#endif
+
+#if STM8S_HSE_ENABLED && (HSECLK == 0)
+#error "impossible to activate HSE"
+#endif
+
+#if !STM8S_HSI_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSI)
+#error "requested HSI clock is not enabled"
+#endif
+
+#if !STM8S_LSI_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_LSI)
+#error "requested LSI clock is not enabled"
+#endif
+
+#if !STM8S_HSE_ENABLED && (STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSE)
+#error "requested HSE clock is not enabled"
+#endif
+
+/**
+ * @brief System clock.
+ */
+#if STM8SL_NO_CLOCK_INIT || defined(__DOXYGEN__)
+#define SYSCLK (HSICLK / 8)
+#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSI
+#define SYSCLK (HSICLK / (1 << STM8S_HSI_DIVIDER))
+#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_LSI
+#define SYSCLK LSICLK
+#elif STM8S_SYSCLK_SOURCE == CLK_SYSSEL_HSE
+#define SYSCLK HSECLK
+#else
+#error "specified invalid clock source"
+#endif
+
+/**
+ * @brief CPU clock.
+ * @details On the STM8SS the CPU clock can be programmed to be a fraction of
+ * the system clock.
+ */
+#define CPUCLK (SYSCLK / (1 << STM8S_CPU_DIVIDER))
+
+/*===========================================================================*/
+/* Driver data structures and types. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* Driver macros. */
+/*===========================================================================*/
+
+/*===========================================================================*/
+/* External declarations. */
+/*===========================================================================*/
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+ void hal_lld_init(void);
+#ifdef __cplusplus
+}
+#endif
+
+#endif /* _HAL_LLD_H_ */
+
+/** @} */
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