git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@1186 35acf78f-673a-0410-8e92-d51de3d6d3f4

1 files changed, 193 insertions, 24 deletions

diff --git a/os/io/platforms/AT91SAM7X/mac_lld.c b/os/io/platforms/AT91SAM7X/mac_lld.c
index 8dc674fcb..e770e0474 100644
--- a/os/io/platforms/AT91SAM7X/mac_lld.c
+++ b/os/io/platforms/AT91SAM7X/mac_lld.c
@@ -26,45 +26,180 @@
 

 #include <ch.h>

 #include <mac.h>

+#include <phy.h>

+

+#include "mii.h"

+#include "at91lib/aic.h"

 

 /**

- * @brief Low level MAC initialization.
+ * @brief EMAC object.
  */

-void mac_lld_init(void) {

+MACDriver MAC1;

+

+#define EMAC_PIN_MASK (AT91C_PB0_ETXCK_EREFCK  | AT91C_PB1_ETXEN         | \

+                       AT91C_PB2_ETX0          | AT91C_PB3_ETX1          | \

+                       AT91C_PB4_ECRS          | AT91C_PB5_ERX0          | \

+                       AT91C_PB6_ERX1          | AT91C_PB7_ERXER         | \

+                       AT91C_PB8_EMDC          | AT91C_PB9_EMDIO         | \

+                       AT91C_PB10_ETX2         | AT91C_PB11_ETX3         | \

+                       AT91C_PB12_ETXER        | AT91C_PB13_ERX2         | \

+                       AT91C_PB14_ERX3         | AT91C_PB15_ERXDV_ECRSDV | \

+                       AT91C_PB16_ECOL         | AT91C_PB17_ERXCK)

+

+#define RSR_BITS (AT91C_EMAC_BNA | AT91C_EMAC_REC | AT91C_EMAC_OVR)

+

+#define TSR_BITS (AT91C_EMAC_UBR | AT91C_EMAC_COL | AT91C_EMAC_RLES | \

+                  AT91C_EMAC_BEX | AT91C_EMAC_COMP | AT91C_EMAC_UND)

 

+#ifndef __DOXYGEN__

+static bool_t link_up;

+

+static uint8_t default_mac[] = {0xAA, 0x55, 0x13, 0x37, 0x01, 0x10};

+

+static MACReceiveDescriptor rd[EMAC_RECEIVE_BUFFERS] __attribute__((aligned(8)));

+static uint8_t rb[EMAC_RECEIVE_BUFFERS * EMAC_RECEIVE_BUFFERS_SIZE] __attribute__((aligned(8)));

+static MACReceiveDescriptor *rxptr;

+

+static MACTransmitDescriptor td[EMAC_TRANSMIT_BUFFERS] __attribute__((aligned(8)));

+static uint8_t tb[EMAC_TRANSMIT_BUFFERS * EMAC_TRANSMIT_BUFFERS_SIZE] __attribute__((aligned(8)));

+static MACTransmitDescriptor *txptr;

+#endif

+

+/**

+ * @brief IRQ handler.
+ */

+/** @cond never*/

+__attribute__((noinline))

+/** @endcond*/

+static void serve_interrupt(void) {

+  uint32_t isr, rsr, tsr;

+

+  /* Fix for the EMAC errata */

+  isr = AT91C_BASE_EMAC->EMAC_ISR;

+  rsr = AT91C_BASE_EMAC->EMAC_RSR;

+  tsr = AT91C_BASE_EMAC->EMAC_TSR;

+

+  if ((isr & AT91C_EMAC_RCOMP) || (rsr & RSR_BITS)) {

+    if (rsr & AT91C_EMAC_REC) {

+      chSysLockFromIsr();

+      chSemSignalI(&MAC1.md_rdsem);

+      chSysUnlockFromIsr();

+    }

+    AT91C_BASE_EMAC->EMAC_RSR = RSR_BITS;

+  }

+

+  if ((isr & AT91C_EMAC_TCOMP) || (tsr & TSR_BITS)) {

+    if (tsr & AT91C_EMAC_COMP) {

+      chSysLockFromIsr();

+      chSemSignalI(&MAC1.md_tdsem);

+      chSysUnlockFromIsr();

+    }

+    AT91C_BASE_EMAC->EMAC_TSR = TSR_BITS;

+  }

+  AT91C_BASE_AIC->AIC_EOICR = 0;

 }

 

 /**

- * @brief Low level MAC address setup.

- *

- * @param[in] macp pointer to the @p MACDriver object

- * @param[in] p pointer to a six bytes buffer containing the MAC address. If

- *            this parameter is set to @p NULL then a system default MAC is

- *            used.

- *

- * @note This function should be invoked after the @p macInit() and before

- *       @p macStart() else the result is unspecified (performed or ignored).

+ * @brief EMAC IRQ veneer handler.

  */

-void mac_lld_set_address(MACDriver *macp, uint8_t *p) {

+CH_IRQ_HANDLER(irq_handler) {

+

+  CH_IRQ_PROLOGUE();

+

+  serve_interrupt();

 

+  CH_IRQ_EPILOGUE();

 }

 

 /**

- * @brief Starts the I/O activity and enters a low power mode.

- *

- * @param[in] macp pointer to the @p MACDriver object

+ * @brief Low level MAC initialization.
  */

-void mac_lld_start(MACDriver *macp) {

+void mac_lld_init(void) {

+  unsigned i;

+

+  macObjectInit(&MAC1);

+

+  /*

+   * Buffers initialization.

+   */

+  for (i = 0; i < EMAC_RECEIVE_BUFFERS; i++) {

+    rd[i].w1 = (uint32_t)&rb[i * EMAC_RECEIVE_BUFFERS_SIZE];

+    rd[i].w2 = 0;

+  }

+  rd[EMAC_RECEIVE_BUFFERS - 1].w1 |= W1_R_WRAP;

+  rxptr = rd;

+  for (i = 0; i < EMAC_TRANSMIT_BUFFERS; i++) {

+    td[i].w1 = (uint32_t)&tb[i * EMAC_TRANSMIT_BUFFERS_SIZE];

+    td[i].w2 = EMAC_TRANSMIT_BUFFERS_SIZE | W2_T_LAST_BUFFER | W2_T_USED;

+  }

+  td[EMAC_TRANSMIT_BUFFERS - 1].w2 |= W2_T_WRAP;

+  txptr = td;

+

+  /*

+   * Associated PHY initialization.
+   */

+  phyReset(&MAC1);

 

+  /*

+   * EMAC pins setup and clock enable. Note, PB18 is not included because it is

+   * used as #PD control and not as EF100.

+   */

+  AT91C_BASE_PMC->PMC_PCER = 1 << AT91C_ID_EMAC;

+  AT91C_BASE_PIOB->PIO_ASR = EMAC_PIN_MASK;

+  AT91C_BASE_PIOB->PIO_PDR = EMAC_PIN_MASK;

+  AT91C_BASE_PIOB->PIO_PPUDR = EMAC_PIN_MASK;

+

+  /*

+   * EMAC Initial setup.

+   */

+  AT91C_BASE_EMAC->EMAC_NCR = 0;                /* Stopped but MCE active.*/

+  AT91C_BASE_EMAC->EMAC_NCFGR = 2 << 10;        /* MDC-CLK = MCK / 32 */

+  AT91C_BASE_EMAC->EMAC_USRIO = AT91C_EMAC_CLKEN;/* Enable EMAC in MII mode.*/

+  AT91C_BASE_EMAC->EMAC_RBQP = (AT91_REG)rd;    /* RX descriptors list.*/

+  AT91C_BASE_EMAC->EMAC_TBQP = (AT91_REG)td;    /* TX descriptors list.*/

+  AT91C_BASE_EMAC->EMAC_RSR = AT91C_EMAC_OVR |

+                              AT91C_EMAC_REC |

+                              AT91C_EMAC_BNA;   /* Clears RSR.*/

+  AT91C_BASE_EMAC->EMAC_NCFGR |= AT91C_EMAC_DRFCS;/* Initial NCFGR settings.*/

+  AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_TE |

+                               AT91C_EMAC_RE |

+                               AT91C_EMAC_CLRSTAT;/* Initial NCR settings.*/

+  mac_lld_set_address(&MAC1, default_mac);

+

+#if PHY_HARDWARE == PHY_MICREL_KS8721

+  /*

+   * PHY device identification.

+   */

+  AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_MPE;

+  if ((phyGet(&MAC1, MII_PHYSID1) != (MII_KS8721_ID >> 16)) ||

+      ((phyGet(&MAC1, MII_PHYSID2) & 0xFFF0) != (MII_KS8721_ID & 0xFFF0)))

+    chSysHalt();

+  AT91C_BASE_EMAC->EMAC_NCR &= ~AT91C_EMAC_MPE;

+#endif

+

+  /*

+   * Interrupt configuration.
+   */

+  AIC_ConfigureIT(AT91C_ID_EMAC,

+                  AT91C_AIC_SRCTYPE_INT_HIGH_LEVEL | EMAC_INTERRUPT_PRIORITY,

+                  irq_handler);

+  AIC_EnableIT(AT91C_ID_EMAC);

 }

 

 /**

- * @brief Stops the I/O activity.

+ * @brief Low level MAC address setup.

  *

  * @param[in] macp pointer to the @p MACDriver object

+ * @param[in] p pointer to a six bytes buffer containing the MAC address. If

+ *            this parameter is set to @p NULL then a system default MAC is

+ *            used. The MAC address must be aligned with the most significant

+ *            byte first.

  */

-void mac_lld_stop(MACDriver *macp) {

+void mac_lld_set_address(MACDriver *macp, uint8_t *p) {

 

+  AT91C_BASE_EMAC->EMAC_SA1L = (AT91_REG)((p[2] << 24) | (p[3] << 16) |

+                                          (p[4] << 8) | p[5]);

+  AT91C_BASE_EMAC->EMAC_SA1H = (AT91_REG)((p[0] << 8) | p[1]);

 }

 

 /**

@@ -73,12 +208,40 @@ void mac_lld_stop(MACDriver *macp) {
  *          returned.

  *

  * @param[in] macp pointer to the @p MACDriver object

+ * @param[in] size size of the frame to be transmitted

  * @return A pointer to a @p MACTransmitDescriptor structure or @p NULL if

- *         a descriptor is not available or the driver went in stop mode.

+ *         a descriptor is not available.

  */

-MACTransmitDescriptor *max_lld_get_transmit_descriptor(MACDriver *macp) {

+MACTransmitDescriptor *max_lld_get_transmit_descriptor(MACDriver *macp,

+                                                       size_t size) {

+  MACTransmitDescriptor *tdp;

 

-  return NULL;

+  chDbgAssert(size <= EMAC_TRANSMIT_BUFFERS_SIZE,

+              "max_lld_get_transmit_descriptor(), #1",

+              "unexpected size");

+

+  if (!link_up)

+    return NULL;

+

+  chSysLock();

+  tdp = txptr;

+  chDbgAssert((tdp->w2 & W2_T_USED) && !(tdp->w2 & W2_T_LOCKED),

+              "max_lld_get_transmit_descriptor(), #2", "buffer not available");

+  if (!(tdp->w2 & W2_T_USED) || (tdp->w2 & W2_T_LOCKED)) {

+    chSysUnlock();

+    return NULL;

+  }

+  /*

+   * Set the buffer size and configuration, the buffer is also marked

+   * as locked.
+   */

+  tdp->w2 = size | W2_T_LOCKED | W2_T_USED | W2_T_LAST_BUFFER;

+  if (++txptr >= &td[EMAC_TRANSMIT_BUFFERS]) {

+    tdp->w2 |= W2_T_WRAP;

+    txptr = td;

+  }

+  chSysUnlock();

+  return tdp;

 }

 

 /**

@@ -87,10 +250,15 @@ MACTransmitDescriptor *max_lld_get_transmit_descriptor(MACDriver *macp) {
  *

  * @param[in] macp pointer to the @p MACDriver object

  * @param[in] tdp the pointer to the @p MACTransmitDescriptor structure

+ * @param[in]

  */

 void mac_lld_release_transmit_descriptor(MACDriver *macp,

                                          MACTransmitDescriptor *tdp) {

 

+  chSysLock();

+  tdp->w2 &= ~(W2_T_LOCKED | W2_T_USED);

+  AT91C_BASE_EMAC->EMAC_NCR |= AT91C_EMAC_TSTART;

+  chSysUnlock();

 }

 

 /**

@@ -108,11 +276,12 @@ uint8_t *mac_lld_get_transmit_buffer(MACTransmitDescriptor *tdp) {
  * @brief Returns a received frame.

  *

  * @param[in] macp pointer to the @p MACDriver object

+ * @param[out szp size of the received frame

  * @return A pointer to a @p MACReceiveDescriptor structure or @p NULL if

- *         the operation timed out, the driver went in stop mode or some

- *         transient error happened.

+ *         the operation timed out or some transient error happened.

  */

-MACReceiveDescriptor *max_lld_get_receive_descriptor(MACDriver *macp) {

+MACReceiveDescriptor *max_lld_get_receive_descriptor(MACDriver *macp,

+                                                     size_t *szp) {

 

   return NULL;

 }