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authortfateba <tfateba@35acf78f-673a-0410-8e92-d51de3d6d3f4>2017-01-14 14:08:09 +0000
committertfateba <tfateba@35acf78f-673a-0410-8e92-d51de3d6d3f4>2017-01-14 14:08:09 +0000
commit5893750163ff96f9f9d15d6d256d6e083c293c89 (patch)
treeee1642e8b2a89fbd720a741a61d0645c39774337 /testhal/AVR/PWM/main.c
parent7e6afddc6eca9e786301fdcabec496d87acd8828 (diff)
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Update the testhal/AVR/PWM with the new ChibiOS architecture.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@10048 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/AVR/PWM/main.c')
-rw-r--r--testhal/AVR/PWM/main.c19
1 files changed, 10 insertions, 9 deletions
diff --git a/testhal/AVR/PWM/main.c b/testhal/AVR/PWM/main.c
index 871bb2530..29c97d96a 100644
--- a/testhal/AVR/PWM/main.c
+++ b/testhal/AVR/PWM/main.c
@@ -45,7 +45,7 @@ int main(void) {
* more can be done in this thread so we first initialize PWM subsystem.
*/
- static PWMConfig pwm1cfg = {
+ static PWMConfig pwm3cfg = {
1023, /* Not real clock */
1023, /* Maximum PWM count */
NULL,
@@ -56,19 +56,20 @@ int main(void) {
},
};
- /* PB5-7 are timer 1 pwm channel outputs */
- palSetPadMode(IOPORT2, 7, PAL_MODE_OUTPUT_PUSHPULL);
- palSetPadMode(IOPORT2, 6, PAL_MODE_OUTPUT_PUSHPULL);
- palSetPadMode(IOPORT2, 5, PAL_MODE_OUTPUT_PUSHPULL);
+ /* PE3-5 are timer 3 pwm channel outputs */
+ palSetPadMode(IOPORT5, 3, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(IOPORT5, 4, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(IOPORT5, 5, PAL_MODE_OUTPUT_PUSHPULL);
- pwmStart(&PWMD1, &pwm1cfg);
+ pwmStart(&PWMD3, &pwm3cfg);
/* channel 0 with 50% duty cycle, 1 with 25% and 2 with 75% */
- pwmEnableChannel(&PWMD1, 0, 511);
- pwmEnableChannel(&PWMD1, 1, 255);
- pwmEnableChannel(&PWMD1, 2, 767);
+ pwmEnableChannel(&PWMD3, 0, 511);
+ pwmEnableChannel(&PWMD3, 1, 255);
+ pwmEnableChannel(&PWMD3, 2, 767);
chSysInit();
while (1) {}
}
+