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author | utzig <utzig@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-07-03 00:26:51 +0000 |
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committer | utzig <utzig@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2013-07-03 00:26:51 +0000 |
commit | 628ab845682617f217ba2e6700827a793980aee4 (patch) | |
tree | 68c8ec12b37e414c655a0b9fdb4194fa50f4b215 /testhal/AVR/PWM/main.c | |
parent | dbc858cc9ccf11e388cc2f45f3d5be3761fb0e60 (diff) | |
download | ChibiOS-628ab845682617f217ba2e6700827a793980aee4.tar.gz ChibiOS-628ab845682617f217ba2e6700827a793980aee4.tar.bz2 ChibiOS-628ab845682617f217ba2e6700827a793980aee4.zip |
Add HAL test for AVR PWM driver
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@5925 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/AVR/PWM/main.c')
-rw-r--r-- | testhal/AVR/PWM/main.c | 51 |
1 files changed, 51 insertions, 0 deletions
diff --git a/testhal/AVR/PWM/main.c b/testhal/AVR/PWM/main.c new file mode 100644 index 000000000..a37d59989 --- /dev/null +++ b/testhal/AVR/PWM/main.c @@ -0,0 +1,51 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+int main(void) {
+
+ halInit();
+ chSysInit();
+
+ static PWMConfig pwm1cfg = {
+ 1023, /* Not real clock */
+ 1023, /* Maximum PWM count */
+ NULL,
+ {
+ {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+ {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+ {PWM_OUTPUT_ACTIVE_HIGH, NULL},
+ },
+ };
+
+ /* PB5-7 are timer 1 pwm channel outputs */
+ palSetPadMode(IOPORT2, 7, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(IOPORT2, 6, PAL_MODE_OUTPUT_PUSHPULL);
+ palSetPadMode(IOPORT2, 5, PAL_MODE_OUTPUT_PUSHPULL);
+
+ pwmStart(&PWMD1, &pwm1cfg);
+
+ /* channel 0 with 50% duty cycle, 1 with 25% and 2 with 75% */
+ pwmEnableChannel(&PWMD1, 0, 511);
+ pwmEnableChannel(&PWMD1, 1, 255);
+ pwmEnableChannel(&PWMD1, 2, 767);
+
+ while (1) {
+ chThdSleepMilliseconds(500);
+ }
+}
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