diff options
| author | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-07 14:34:59 +0000 |
|---|---|---|
| committer | barthess <barthess@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2011-06-07 14:34:59 +0000 |
| commit | 5cad241306f64d0a3c0f7829421e4bf8f4b18fbe (patch) | |
| tree | ebbcad6d0cdb19fa5ef0bf5f6dc5cf80dfbdc4d1 /testhal/STM32/GPT/main.c | |
| parent | 152f34a80c6ffe5fd17809732272823091b854e8 (diff) | |
| parent | aec912f13f9aa85cd677353fa556f679c3832970 (diff) | |
| download | ChibiOS-5cad241306f64d0a3c0f7829421e4bf8f4b18fbe.tar.gz ChibiOS-5cad241306f64d0a3c0f7829421e4bf8f4b18fbe.tar.bz2 ChibiOS-5cad241306f64d0a3c0f7829421e4bf8f4b18fbe.zip | |
I2C. Merged code from trunk.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/branches/i2c_dev@3036 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32/GPT/main.c')
| -rw-r--r-- | testhal/STM32/GPT/main.c | 95 |
1 files changed, 95 insertions, 0 deletions
diff --git a/testhal/STM32/GPT/main.c b/testhal/STM32/GPT/main.c new file mode 100644 index 000000000..57b2977d1 --- /dev/null +++ b/testhal/STM32/GPT/main.c @@ -0,0 +1,95 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006,2007,2008,2009,2010,
+ 2011 Giovanni Di Sirio.
+
+ This file is part of ChibiOS/RT.
+
+ ChibiOS/RT is free software; you can redistribute it and/or modify
+ it under the terms of the GNU General Public License as published by
+ the Free Software Foundation; either version 3 of the License, or
+ (at your option) any later version.
+
+ ChibiOS/RT is distributed in the hope that it will be useful,
+ but WITHOUT ANY WARRANTY; without even the implied warranty of
+ MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ GNU General Public License for more details.
+
+ You should have received a copy of the GNU General Public License
+ along with this program. If not, see <http://www.gnu.org/licenses/>.
+*/
+
+#include "ch.h"
+#include "hal.h"
+
+/*
+ * GPT1 callback.
+ */
+static void gpt1cb(GPTDriver *gptp) {
+
+ (void)gptp;
+ palClearPad(IOPORT3, GPIOC_LED);
+ chSysLockFromIsr();
+ gptStartOneShotI(&GPTD2, 200); /* 0.02 second pulse.*/
+ chSysUnlockFromIsr();
+}
+
+/*
+ * GPT2 callback.
+ */
+static void gpt2cb(GPTDriver *gptp) {
+
+ (void)gptp;
+ palSetPad(IOPORT3, GPIOC_LED);
+}
+
+/*
+ * GPT1 configuration.
+ */
+static const GPTConfig gpt1cfg = {
+ 10000, /* 10KHz timer clock.*/
+ gpt1cb /* Timer callback.*/
+};
+
+/*
+ * GPT2 configuration.
+ */
+static const GPTConfig gpt2cfg = {
+ 10000, /* 10KHz timer clock.*/
+ gpt2cb /* Timer callback.*/
+};
+
+/*
+ * Application entry point.
+ */
+int main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Initializes the GPT drivers 1 and 2.
+ */
+ gptStart(&GPTD1, &gpt1cfg);
+ gptPolledDelay(&GPTD1, 10); /* Small dealy.*/
+ gptStart(&GPTD2, &gpt2cfg);
+ gptPolledDelay(&GPTD2, 10); /* Small dealy.*/
+
+ /*
+ * Normal main() thread activity, it changes the GPT1 period every
+ * five seconds.
+ */
+ while (TRUE) {
+ gptStartContinuous(&GPTD1, 5000);
+ chThdSleepMilliseconds(5000);
+ gptStartContinuous(&GPTD1, 2500);
+ chThdSleepMilliseconds(5000);
+ }
+ return 0;
+}
|