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| author | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-09-02 13:56:57 +0000 |
|---|---|---|
| committer | gdisirio <gdisirio@35acf78f-673a-0410-8e92-d51de3d6d3f4> | 2015-09-02 13:56:57 +0000 |
| commit | 9b7696e58f3b006da9fdc60003f640197951681b (patch) | |
| tree | 94381e5096cb9d5e1dacda694768d63dc358d596 /testhal/STM32/STM32F7xx | |
| parent | 4f5b2d0c975d001949f34d082b1efd764f97c58a (diff) | |
| download | ChibiOS-9b7696e58f3b006da9fdc60003f640197951681b.tar.gz ChibiOS-9b7696e58f3b006da9fdc60003f640197951681b.tar.bz2 ChibiOS-9b7696e58f3b006da9fdc60003f640197951681b.zip | |
STM32F7-specific LD rules file introduced. Code is accessed through the ITCM bus, constants are accessed through AXI bus. Added DMA-friendly region handling.
git-svn-id: svn://svn.code.sf.net/p/chibios/svn/trunk@8270 35acf78f-673a-0410-8e92-d51de3d6d3f4
Diffstat (limited to 'testhal/STM32/STM32F7xx')
| -rw-r--r-- | testhal/STM32/STM32F7xx/GPT-ADC/chconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F7xx/PWM-ICU/chconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F7xx/SPI/chconf.h | 2 | ||||
| -rw-r--r-- | testhal/STM32/STM32F7xx/SPI/main.c | 4 | ||||
| -rw-r--r-- | testhal/STM32/STM32F7xx/USB_CDC/chconf.h | 2 |
5 files changed, 4 insertions, 8 deletions
diff --git a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h index eaf41bdee..1646c0e44 100644 --- a/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h +++ b/testhal/STM32/STM32F7xx/GPT-ADC/chconf.h @@ -494,7 +494,7 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
diff --git a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h index eaf41bdee..1646c0e44 100644 --- a/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h +++ b/testhal/STM32/STM32F7xx/PWM-ICU/chconf.h @@ -494,7 +494,7 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
diff --git a/testhal/STM32/STM32F7xx/SPI/chconf.h b/testhal/STM32/STM32F7xx/SPI/chconf.h index eaf41bdee..1646c0e44 100644 --- a/testhal/STM32/STM32F7xx/SPI/chconf.h +++ b/testhal/STM32/STM32F7xx/SPI/chconf.h @@ -494,7 +494,7 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
diff --git a/testhal/STM32/STM32F7xx/SPI/main.c b/testhal/STM32/STM32F7xx/SPI/main.c index bfed6c07c..7632ca393 100644 --- a/testhal/STM32/STM32F7xx/SPI/main.c +++ b/testhal/STM32/STM32F7xx/SPI/main.c @@ -185,10 +185,6 @@ int main(void) { PAL_MODE_OUTPUT_PUSHPULL); /* CS1. */
/*
- * Prepare transmit pattern.
- */
-
- /*
* Starting the transmitter and receiver threads.
*/
chThdCreateStatic(spi_thread_1_wa, sizeof(spi_thread_1_wa),
diff --git a/testhal/STM32/STM32F7xx/USB_CDC/chconf.h b/testhal/STM32/STM32F7xx/USB_CDC/chconf.h index eaf41bdee..1646c0e44 100644 --- a/testhal/STM32/STM32F7xx/USB_CDC/chconf.h +++ b/testhal/STM32/STM32F7xx/USB_CDC/chconf.h @@ -494,7 +494,7 @@ /* Port-specific settings (override port settings defaulted in chcore.h). */
/*===========================================================================*/
-#define CORTEX_VTOR_INIT 0x08000000U
+#define CORTEX_VTOR_INIT 0x00200000U
#endif /* _CHCONF_H_ */
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