diff options
| -rw-r--r-- | os/hal/platforms/STM32/i2c_lld.c | 14 | ||||
| -rw-r--r-- | os/hal/platforms/STM32/i2c_lld.h | 1 |
2 files changed, 14 insertions, 1 deletions
diff --git a/os/hal/platforms/STM32/i2c_lld.c b/os/hal/platforms/STM32/i2c_lld.c index 8802d5af4..a6e03d010 100644 --- a/os/hal/platforms/STM32/i2c_lld.c +++ b/os/hal/platforms/STM32/i2c_lld.c @@ -228,6 +228,13 @@ void i2c_lld_stop(I2CDriver *i2cp) { i2cp->id_state = I2C_STOP; } + + +void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart){ + ; +} + + /** * @brief Transmits data ever the I2C bus as master. * TODO:@details @@ -245,8 +252,13 @@ void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t re i2cp->id_slave_config->rw_bit = I2C_WRITE; //TODO: setup DMA channel here - i2cp->id_i2c->CR1 |= I2C_CR1_START; // generate start condition + // + // + i2cp->id_i2c->CR1 |= I2C_CR1_START; // generate start condition + while (!(i2cp->id_i2c->SR1 & I2C_SR1_SB)){ + i++; // wait Address sent + } i2cp->id_i2c->DR = (i2cp->id_slave_config->slave_addr1 << 1) | I2C_WRITE; // write slave addres in DR while (!(i2cp->id_i2c->SR1 & I2C_SR1_ADDR)){ diff --git a/os/hal/platforms/STM32/i2c_lld.h b/os/hal/platforms/STM32/i2c_lld.h index 0179ba0e8..72b190eba 100644 --- a/os/hal/platforms/STM32/i2c_lld.h +++ b/os/hal/platforms/STM32/i2c_lld.h @@ -225,6 +225,7 @@ void i2c_lld_stop(I2CDriver *i2cp); void i2c_lld_master_start(I2CDriver *i2cp, uint16_t header); void i2c_lld_master_stop(I2CDriver *i2cp); void i2c_lld_master_transmit(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart); +void i2c_lld_master_transmitI(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg, bool_t restart); void i2c_lld_master_receive(I2CDriver *i2cp, I2CSlaveConfig *i2cscfg); //static i2cflags_t translate_errors(uint16_t sr); |