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-rw-r--r--os/ports/IAR/ARMCMx/chcore_v7m.c4
-rw-r--r--readme.txt6
-rw-r--r--testhal/STM32F4xx/IRQ_STORM_FPU/main.c1
3 files changed, 3 insertions, 8 deletions
diff --git a/os/ports/IAR/ARMCMx/chcore_v7m.c b/os/ports/IAR/ARMCMx/chcore_v7m.c
index ee6e41360..ab227efa6 100644
--- a/os/ports/IAR/ARMCMx/chcore_v7m.c
+++ b/os/ports/IAR/ARMCMx/chcore_v7m.c
@@ -116,8 +116,6 @@ void _port_init(void) {
#if CORTEX_USE_FPU
{
- uint32_t reg;
-
/* Initializing the FPU context save in lazy mode.*/
SCB_FPCCR = FPCCR_ASPEN | FPCCR_LSPEN;
@@ -125,7 +123,7 @@ void _port_init(void) {
SCB_CPACR |= 0x00F00000;
/* Enables FPU context save/restore on exception entry/exit (FPCA bit).*/
- __set_control(__get_control() | 4);
+ __set_CONTROL(__get_CONTROL() | 4);
/* FPSCR and FPDSCR initially zero.*/
__set_FPSCR(0);
diff --git a/readme.txt b/readme.txt
index c45d3bad3..895ba409f 100644
--- a/readme.txt
+++ b/readme.txt
@@ -84,10 +84,8 @@
the duplicated instances under the GCC, IAR and Keil ports. Function names
prefixes changed from "NVIC" to "nvic" because style conventions.
- NEW: Added voltage regulator initialization to the STM32F4xx HAL.
-- NEW: Modified the STM32F4-Discovery demo to put critical kernel data
- structures and stacks in the CCM RAM instead normal RAM. It is done using
- a special .ld file that can be customized to decide how to allocate data
- in the various RAM sections.
+- NEW: Added a linker script that demonstrates how to put stacks and other
+ critical structures in the CCM RAM instead normal RAM.
- NEW: Added experimental support for the Cortex-M4 FPU (default when the
FPU is present).
- NEW: Improved I2C driver model and STM32 implementation by Barthess.
diff --git a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c
index 7b751ed3c..9e1dc1468 100644
--- a/testhal/STM32F4xx/IRQ_STORM_FPU/main.c
+++ b/testhal/STM32F4xx/IRQ_STORM_FPU/main.c
@@ -301,5 +301,4 @@ int main(void) {
while (TRUE) {
chThdSleepMilliseconds(5000);
}
- return 0;
}