diff options
| -rw-r--r-- | os/hal/platforms/STM32F3xx/hal_lld.c | 15 |
1 files changed, 7 insertions, 8 deletions
diff --git a/os/hal/platforms/STM32F3xx/hal_lld.c b/os/hal/platforms/STM32F3xx/hal_lld.c index 8f7fe9102..f82e23c19 100644 --- a/os/hal/platforms/STM32F3xx/hal_lld.c +++ b/os/hal/platforms/STM32F3xx/hal_lld.c @@ -124,6 +124,13 @@ void hal_lld_init(void) { #if STM32_PVD_ENABLE
PWR->CR |= PWR_CR_PVDE | (STM32_PLS & STM32_PLS_MASK);
#endif /* STM32_PVD_ENABLE */
+
+ /* SYSCFG clock enabled here because it is a multi-functional unit shared
+ among multiple drivers.*/
+ rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
+
+ /* USB IRQ relocated to not conflict with CAN.*/
+ SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
}
/**
@@ -192,14 +199,6 @@ void stm32_clock_init(void) { while ((RCC->CFGR & RCC_CFGR_SWS) != (STM32_SW << 2))
; /* Waits selection complete. */
#endif
-
- /* SYSCFG clock enabled here because it is a multi-functional unit shared
- among multiple drivers.*/
- rccEnableAPB2(RCC_APB2ENR_SYSCFGEN, TRUE);
-
- /* USB IRQ relocated to not conflict with CAN.*/
- SYSCFG->CFGR1 |= SYSCFG_CFGR1_USB_IT_RMP;
-
#endif /* !STM32_NO_INIT */
}
|