diff options
Diffstat (limited to 'demos/STM8S-STM8S208-RC')
| -rw-r--r-- | demos/STM8S-STM8S208-RC/ch.rapp | 160 | ||||
| -rw-r--r-- | demos/STM8S-STM8S208-RC/ch.rprj | 4 | ||||
| -rw-r--r-- | demos/STM8S-STM8S208-RC/chconf.h | 531 | ||||
| -rw-r--r-- | demos/STM8S-STM8S208-RC/halconf.h | 312 | ||||
| -rw-r--r-- | demos/STM8S-STM8S208-RC/main.c | 73 | ||||
| -rw-r--r-- | demos/STM8S-STM8S208-RC/mcuconf.h | 47 | ||||
| -rw-r--r-- | demos/STM8S-STM8S208-RC/readme.txt | 16 |
7 files changed, 1143 insertions, 0 deletions
diff --git a/demos/STM8S-STM8S208-RC/ch.rapp b/demos/STM8S-STM8S208-RC/ch.rapp new file mode 100644 index 000000000..095ec0874 --- /dev/null +++ b/demos/STM8S-STM8S208-RC/ch.rapp @@ -0,0 +1,160 @@ +
+<ApplicationBuild Header="ch" Extern=".\ch.rapp" Path=".\ch.rapp" OutputFile="..\STM8S-STM8S208-RC/bin\ch.aof" sate="96" AsyncBuild="" >
+ <Group Header="kernel" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\os\kernel\src\chcond.c" Header="chcond.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chcond.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chdebug.c" Header="chdebug.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chdebug.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chdynamic.c" Header="chdynamic.c" Marker="-1" AsyncBuild="" OutputFile="..\STM8S-STM8S208-RC/bin\chdynamic.obj" sate="0" />
+ <NodeC Path="..\..\os\kernel\src\chevents.c" Header="chevents.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chevents.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chheap.c" Header="chheap.c" Marker="0" OutputFile="..\STM8S-STM8S208-RC/bin\chheap.obj" sate="0" AsyncBuild="" >
+ <Options>
+ <Config Header="Standard" >
+ <Set Header="RCST7" >
+ <Section Header="Model" >
+ <Property Header="GlobalMemory" Value="" Removable="1" />
+
+ </Section>
+
+ </Set>
+
+ </Config>
+
+ </Options>
+
+ </NodeC>
+ <NodeC Path="..\..\os\kernel\src\chlists.c" Header="chlists.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chlists.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chmboxes.c" Header="chmboxes.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chmboxes.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chmemcore.c" Header="chmemcore.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chmemcore.obj" sate="0" AsyncBuild="" > </NodeC>
+ <NodeC Path="..\..\os\kernel\src\chmempools.c" Header="chmempools.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chmempools.obj" sate="0" AsyncBuild="" > </NodeC>
+ <NodeC Path="..\..\os\kernel\src\chmsg.c" Header="chmsg.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chmsg.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chmtx.c" Header="chmtx.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chmtx.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chqueues.c" Header="chqueues.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chqueues.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chregistry.c" Header="chregistry.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chregistry.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chschd.c" Header="chschd.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chschd.obj" sate="0" AsyncBuild="" >
+ <Options/>
+
+ </NodeC>
+ <NodeC Path="..\..\os\kernel\src\chsem.c" Header="chsem.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chsem.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chsys.c" Header="chsys.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chsys.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chthreads.c" Header="chthreads.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chthreads.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\kernel\src\chvt.c" Header="chvt.c" Marker="0" OutputFile="..\STM8S-STM8S208-RC/bin\chvt.obj" sate="0" AsyncBuild="" >
+ <Options>
+ <Config Header="Standard" >
+ <Set Header="RCST7" >
+ <Section Header="Model" >
+ <Property Header="GlobalMemory" Value="" Removable="1" />
+
+ </Section>
+
+ </Set>
+
+ </Config>
+
+ </Options>
+
+ </NodeC>
+
+ </Group>
+ <Group Header="test" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\test\test.c" Header="test.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\test.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testbmk.c" Header="testbmk.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testbmk.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testdyn.c" Header="testdyn.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testdyn.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testevt.c" Header="testevt.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testevt.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testheap.c" Header="testheap.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testheap.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testmbox.c" Header="testmbox.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testmbox.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testmsg.c" Header="testmsg.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testmsg.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testmtx.c" Header="testmtx.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testmtx.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testpools.c" Header="testpools.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testpools.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testqueues.c" Header="testqueues.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testqueues.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testsem.c" Header="testsem.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testsem.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\test\testthd.c" Header="testthd.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\testthd.obj" sate="0" AsyncBuild="" />
+
+ </Group>
+ <Group Header="port" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\os\ports\RC\STM8\chcore.c" Header="chcore.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\chcore.obj" sate="0" AsyncBuild="" />
+
+ </Group>
+ <Group Header="hal" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\os\hal\src\adc.c" Header="adc.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\adc.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\can.c" Header="can.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\can.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\hal.c" Header="hal.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\hal.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\mac.c" Header="mac.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\mac.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\mmc_spi.c" Header="mmc_spi.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\mmc_spi.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\pal.c" Header="pal.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\pal.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\pwm.c" Header="pwm.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\pwm.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\serial.c" Header="serial.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\serial.obj" sate="0" AsyncBuild="" />
+ <NodeC Path="..\..\os\hal\src\spi.c" Header="spi.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\spi.obj" sate="0" AsyncBuild="" />
+ <Group Header="stm8s" Marker="-1" AsyncBuild="" OutputFile="" sate="0" >
+ <NodeC Path="..\..\os\hal\platforms\STM8S\hal_lld.c" Header="hal_lld.c" Marker="-1" AsyncBuild="" OutputFile="..\STM8S-STM8S208-RC/bin\hal_lld.obj" sate="0" />
+ <NodeC Path="..\..\os\hal\platforms\STM8S\pal_lld.c" Header="pal_lld.c" Marker="-1" AsyncBuild="" OutputFile="..\STM8S-STM8S208-RC/bin\pal_lld.obj" sate="0" />
+ <NodeC Path="..\..\os\hal\platforms\STM8S\serial_lld.c" Header="serial_lld.c" Marker="-1" AsyncBuild="" OutputFile="..\STM8S-STM8S208-RC/bin\serial_lld.obj" sate="0" />
+ <NodeC Path="..\..\os\hal\platforms\STM8S\spi_lld.c" Header="spi_lld.c" Marker="-1" AsyncBuild="" OutputFile="..\STM8S-STM8S208-RC/bin\spi_lld.obj" sate="0" />
+
+ </Group>
+
+ </Group>
+ <Group Header="board" Marker="-1" OutputFile="" sate="0" AsyncBuild="" >
+ <NodeC Path="..\..\boards\RAISONANCE_REVA_STM8S\board.c" Header="board.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\board.obj" sate="0" AsyncBuild="" />
+
+ </Group>
+ <NodeC Path=".\main.c" Header="main.c" Marker="-1" OutputFile="..\STM8S-STM8S208-RC/bin\main.obj" sate="0" AsyncBuild="" />
+ <Options>
+ <Config Header="Standard" >
+ <Set Header="ApplicationBuild" >
+ <Section Header="General" >
+ <Property Header="TargetFamily" Value="ST7" />
+
+ </Section>
+ <Section Header="Directories" >
+ <Property Header="IncDir" Value="$(RkitInc);$(RkitInc)\ST7;..\..\os\kernel\include;..\..\os\ports\RC\STM8;..\..\os\hal\include;..\..\os\hal\platforms\STM8S;..\..\boards\RAISONANCE_REVA_STM8S;..\..\test" Removable="1" />
+ <Property Header="OutDir" Value="$(ApplicationDir)/bin" Removable="1" />
+ <Property Header="ListDir" Value="$(ApplicationDir)/lst" Removable="1" />
+ <Property Header="LinkerOutputDir" Value="Output Directory" Removable="1" />
+
+ </Section>
+
+ </Set>
+ <Set Header="Target" >
+ <Section Header="ProcessorST7" >
+ <Property Header="Processor" Value="STM8S208MB" Removable="1" />
+
+ </Section>
+ <Section Header="ToolSetST7" >
+ <Property Header="BuildToolSetST7" Value="ST7\RaisonanceTools.config" Removable="1" />
+ <Property Header="ArelocInfo" Value="" Removable="1" />
+ <Property Header="Areloc" Value="REM" Removable="1" />
+
+ </Section>
+ <Section Header="DebugST7" >
+ <Property Header="Startup" Value="1" Removable="1" />
+ <Property Header="DebugTool_STM8" Value="RLINK_STM8" Removable="1" />
+
+ </Section>
+
+ </Set>
+ <Set Header="RCST7" >
+ <Section Header="CodeGen" >
+ <Property Header="ENUMTYPE" Value="ET(CHAR)" Removable="1" />
+
+ </Section>
+ <Section Header="Model" >
+ <Property Header="GlobalMemory" Value="DGC(DATA)" Removable="1" />
+ <Property Header="ModelP" Value="STM8(SMALL)" Removable="1" />
+
+ </Section>
+ <Section Header="OPTIM" >
+ <Property Header="OTLEVEL" Value="3" Removable="1" />
+ <Property Header="SPEEDSIZE" Value="SPEED" Removable="1" />
+
+ </Section>
+
+ </Set>
+ <Set Header="MAST7" >
+ <Section Header="Set" >
+ <Property Header="Defines" Value="STM8S208RB" Removable="1" />
+
+ </Section>
+
+ </Set>
+ </Config>
+ </Options>
+</ApplicationBuild>
\ No newline at end of file diff --git a/demos/STM8S-STM8S208-RC/ch.rprj b/demos/STM8S-STM8S208-RC/ch.rprj new file mode 100644 index 000000000..90c037168 --- /dev/null +++ b/demos/STM8S-STM8S208-RC/ch.rprj @@ -0,0 +1,4 @@ +
+<Project Header="Project 'ch'" Path=".\ch.rprj" Project="Yes" OutputFile="" sate="98" ActiveApp="ch" AsyncBuild="" >
+ <ApplicationBuild Header="ch" Extern=".\ch.rapp" Path=".\ch.rapp" OutputFile="..\STM8S-STM8S208-RC/bin\ch.aof" sate="96" AsyncBuild="" />
+</Project>
\ No newline at end of file diff --git a/demos/STM8S-STM8S208-RC/chconf.h b/demos/STM8S-STM8S208-RC/chconf.h new file mode 100644 index 000000000..4e460e488 --- /dev/null +++ b/demos/STM8S-STM8S208-RC/chconf.h @@ -0,0 +1,531 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/chconf.h
+ * @brief Configuration file template.
+ * @details A copy of this file must be placed in each project directory, it
+ * contains the application specific kernel settings.
+ *
+ * @addtogroup config
+ * @details Kernel related settings and hooks.
+ * @{
+ */
+
+#ifndef _CHCONF_H_
+#define _CHCONF_H_
+
+/*===========================================================================*/
+/**
+ * @name Kernel parameters and options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief System tick frequency.
+ * @details Frequency of the system timer that drives the system ticks. This
+ * setting also defines the system tick time unit.
+ */
+#if !defined(CH_FREQUENCY) || defined(__DOXYGEN__)
+#define CH_FREQUENCY 100
+#endif
+
+/**
+ * @brief Round robin interval.
+ * @details This constant is the number of system ticks allowed for the
+ * threads before preemption occurs. Setting this value to zero
+ * disables the preemption for threads with equal priority and the
+ * round robin becomes cooperative. Note that higher priority
+ * threads can still preempt, the kernel is always preemptive.
+ *
+ * @note Disabling the round robin preemption makes the kernel more compact
+ * and generally faster.
+ */
+#if !defined(CH_TIME_QUANTUM) || defined(__DOXYGEN__)
+#define CH_TIME_QUANTUM 10
+#endif
+
+/**
+ * @brief Managed RAM size.
+ * @details Size of the RAM area to be managed by the OS. If set to zero
+ * then the whole available RAM is used. The core memory is made
+ * available to the heap allocator and/or can be used directly through
+ * the simplified core memory allocator.
+ *
+ * @note In order to let the OS manage the whole RAM the linker script must
+ * provide the @p __heap_base__ and @p __heap_end__ symbols.
+ * @note Requires @p CH_USE_MEMCORE.
+ */
+#if !defined(CH_MEMCORE_SIZE) || defined(__DOXYGEN__)
+#define CH_MEMCORE_SIZE 128
+#endif
+
+/**
+ * @brief Idle thread automatic spawn suppression.
+ * @details When this option is activated the function @p chSysInit()
+ * does not spawn the idle thread automatically. The application has
+ * then the responsibility to do one of the following:
+ * - Spawn a custom idle thread at priority @p IDLEPRIO.
+ * - Change the main() thread priority to @p IDLEPRIO then enter
+ * an endless loop. In this scenario the @p main() thread acts as
+ * the idle thread.
+ * .
+ * @note Unless an idle thread is spawned the @p main() thread must not
+ * enter a sleep state.
+ */
+#if !defined(CH_NO_IDLE_THREAD) || defined(__DOXYGEN__)
+#define CH_NO_IDLE_THREAD FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Performance options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief OS optimization.
+ * @details If enabled then time efficient rather than space efficient code
+ * is used when two possible implementations exist.
+ *
+ * @note This is not related to the compiler optimization options.
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_OPTIMIZE_SPEED) || defined(__DOXYGEN__)
+#define CH_OPTIMIZE_SPEED FALSE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Subsystem options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads registry APIs.
+ * @details If enabled then the registry APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_REGISTRY) || defined(__DOXYGEN__)
+#define CH_USE_REGISTRY TRUE
+#endif
+
+/**
+ * @brief Threads synchronization APIs.
+ * @details If enabled then the @p chThdWait() function is included in
+ * the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_WAITEXIT) || defined(__DOXYGEN__)
+#define CH_USE_WAITEXIT TRUE
+#endif
+
+/**
+ * @brief Semaphores APIs.
+ * @details If enabled then the Semaphores APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_SEMAPHORES) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES TRUE
+#endif
+
+/**
+ * @brief Semaphores queuing mode.
+ * @details If enabled then the threads are enqueued on semaphores by
+ * priority rather than in FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMAPHORES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_SEMAPHORES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Atomic semaphore API.
+ * @details If enabled then the semaphores the @p chSemSignalWait() API
+ * is included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_SEMSW) || defined(__DOXYGEN__)
+#define CH_USE_SEMSW TRUE
+#endif
+
+/**
+ * @brief Mutexes APIs.
+ * @details If enabled then the mutexes APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MUTEXES) || defined(__DOXYGEN__)
+#define CH_USE_MUTEXES TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs.
+ * @details If enabled then the conditional variables APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MUTEXES.
+ */
+#if !defined(CH_USE_CONDVARS) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS TRUE
+#endif
+
+/**
+ * @brief Conditional Variables APIs with timeout.
+ * @details If enabled then the conditional variables APIs with timeout
+ * specification are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_CONDVARS.
+ */
+#if !defined(CH_USE_CONDVARS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_CONDVARS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs.
+ * @details If enabled then the event flags APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_EVENTS) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS TRUE
+#endif
+
+/**
+ * @brief Events Flags APIs with timeout.
+ * @details If enabled then the events APIs with timeout specification
+ * are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_EVENTS.
+ */
+#if !defined(CH_USE_EVENTS_TIMEOUT) || defined(__DOXYGEN__)
+#define CH_USE_EVENTS_TIMEOUT TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages APIs.
+ * @details If enabled then the synchronous messages APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MESSAGES) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES TRUE
+#endif
+
+/**
+ * @brief Synchronous Messages queuing mode.
+ * @details If enabled then messages are served by priority rather than in
+ * FIFO order.
+ *
+ * @note The default is @p FALSE. Enable this if you have special requirements.
+ * @note Requires @p CH_USE_MESSAGES.
+ */
+#if !defined(CH_USE_MESSAGES_PRIORITY) || defined(__DOXYGEN__)
+#define CH_USE_MESSAGES_PRIORITY FALSE
+#endif
+
+/**
+ * @brief Mailboxes APIs.
+ * @details If enabled then the asynchronous messages (mailboxes) APIs are
+ * included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_SEMAPHORES.
+ */
+#if !defined(CH_USE_MAILBOXES) || defined(__DOXYGEN__)
+#define CH_USE_MAILBOXES TRUE
+#endif
+
+/**
+ * @brief I/O Queues APIs.
+ * @details If enabled then the I/O queues APIs are included in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_QUEUES) || defined(__DOXYGEN__)
+#define CH_USE_QUEUES TRUE
+#endif
+
+/**
+ * @brief Core Memory Manager APIs.
+ * @details If enabled then the core memory manager APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMCORE) || defined(__DOXYGEN__)
+#define CH_USE_MEMCORE TRUE
+#endif
+
+/**
+ * @brief Heap Allocator APIs.
+ * @details If enabled then the memory heap allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_MEMCORE and either @p CH_USE_MUTEXES or
+ * @p CH_USE_SEMAPHORES.
+ * @note Mutexes are recommended.
+ */
+#if !defined(CH_USE_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_HEAP TRUE
+#endif
+
+/**
+ * @brief C-runtime allocator.
+ * @details If enabled the the heap allocator APIs just wrap the C-runtime
+ * @p malloc() and @p free() functions.
+ *
+ * @note The default is @p FALSE.
+ * @note Requires @p CH_USE_HEAP.
+ * @note The C-runtime may or may not require @p CH_USE_MEMCORE, see the
+ * appropriate documentation.
+ */
+#if !defined(CH_USE_MALLOC_HEAP) || defined(__DOXYGEN__)
+#define CH_USE_MALLOC_HEAP FALSE
+#endif
+
+/**
+ * @brief Memory Pools Allocator APIs.
+ * @details If enabled then the memory pools allocator APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ */
+#if !defined(CH_USE_MEMPOOLS) || defined(__DOXYGEN__)
+#define CH_USE_MEMPOOLS TRUE
+#endif
+
+/**
+ * @brief Dynamic Threads APIs.
+ * @details If enabled then the dynamic threads creation APIs are included
+ * in the kernel.
+ *
+ * @note The default is @p TRUE.
+ * @note Requires @p CH_USE_WAITEXIT.
+ * @note Requires @p CH_USE_HEAP and/or @p CH_USE_MEMPOOLS.
+ */
+#if !defined(CH_USE_DYNAMIC) || defined(__DOXYGEN__)
+#define CH_USE_DYNAMIC TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Debug options
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Debug option, system state check.
+ * @details If enabled the correct call protocol for system APIs is checked
+ * at runtime.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_SYSTEM_STATE_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_SYSTEM_STATE_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, parameters checks.
+ * @details If enabled then the checks on the API functions input
+ * parameters are activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_CHECKS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_CHECKS FALSE
+#endif
+
+/**
+ * @brief Debug option, consistency checks.
+ * @details If enabled then all the assertions in the kernel code are
+ * activated. This includes consistency checks inside the kernel,
+ * runtime anomalies and port-defined checks.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_ASSERTS) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_ASSERTS FALSE
+#endif
+
+/**
+ * @brief Debug option, trace buffer.
+ * @details If enabled then the context switch circular trace buffer is
+ * activated.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_ENABLE_TRACE) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_TRACE FALSE
+#endif
+
+/**
+ * @brief Debug option, stack checks.
+ * @details If enabled then a runtime stack check is performed.
+ *
+ * @note The default is @p FALSE.
+ * @note The stack check is performed in a architecture/port dependent way.
+ * It may not be implemented or some ports.
+ * @note The default failure mode is to halt the system with the global
+ * @p panic_msg variable set to @p NULL.
+ */
+#if !defined(CH_DBG_ENABLE_STACK_CHECK) || defined(__DOXYGEN__)
+#define CH_DBG_ENABLE_STACK_CHECK FALSE
+#endif
+
+/**
+ * @brief Debug option, stacks initialization.
+ * @details If enabled then the threads working area is filled with a byte
+ * value when a thread is created. This can be useful for the
+ * runtime measurement of the used stack.
+ *
+ * @note The default is @p FALSE.
+ */
+#if !defined(CH_DBG_FILL_THREADS) || defined(__DOXYGEN__)
+#define CH_DBG_FILL_THREADS FALSE
+#endif
+
+/**
+ * @brief Debug option, threads profiling.
+ * @details If enabled then a field is added to the @p Thread structure that
+ * counts the system ticks occurred while executing the thread.
+ *
+ * @note The default is @p TRUE.
+ * @note This debug option is defaulted to TRUE because it is required by
+ * some test cases into the test suite.
+ */
+#if !defined(CH_DBG_THREADS_PROFILING) || defined(__DOXYGEN__)
+#define CH_DBG_THREADS_PROFILING TRUE
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/**
+ * @name Kernel hooks
+ * @{
+ */
+/*===========================================================================*/
+
+/**
+ * @brief Threads descriptor structure extension.
+ * @details User fields added to the end of the @p Thread structure.
+ */
+#if !defined(THREAD_EXT_FIELDS) || defined(__DOXYGEN__)
+#define THREAD_EXT_FIELDS \
+ /* Add threads custom fields here.*/
+#endif
+
+/**
+ * @brief Threads initialization hook.
+ * @details User initialization code added to the @p chThdInit() API.
+ *
+ * @note It is invoked from within @p chThdInit() and implicitly from all
+ * the threads creation APIs.
+ */
+#if !defined(THREAD_EXT_INIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_INIT_HOOK(tp) { \
+ /* Add threads initialization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Threads finalization hook.
+ * @details User finalization code added to the @p chThdExit() API.
+ *
+ * @note It is inserted into lock zone.
+ * @note It is also invoked when the threads simply return in order to
+ * terminate.
+ */
+#if !defined(THREAD_EXT_EXIT_HOOK) || defined(__DOXYGEN__)
+#define THREAD_EXT_EXIT_HOOK(tp) { \
+ /* Add threads finalization code here.*/ \
+}
+#endif
+
+/**
+ * @brief Context switch hook.
+ * @details This hook is invoked just before switching between threads.
+ */
+#if !defined(THREAD_CONTEXT_SWITCH_HOOK) || defined(__DOXYGEN__)
+#define THREAD_CONTEXT_SWITCH_HOOK(ntp, otp) { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/**
+ * @brief Idle Loop hook.
+ * @details This hook is continuously invoked by the idle thread loop.
+ */
+#if !defined(IDLE_LOOP_HOOK) || defined(__DOXYGEN__)
+#define IDLE_LOOP_HOOK() { \
+ /* Idle loop code here.*/ \
+}
+#endif
+
+/**
+ * @brief System tick event hook.
+ * @details This hook is invoked in the system tick handler immediately
+ * after processing the virtual timers queue.
+ */
+#if !defined(SYSTEM_TICK_EVENT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_TICK_EVENT_HOOK() { \
+ /* System tick event code here.*/ \
+}
+#endif
+
+/**
+ * @brief System halt hook.
+ * @details This hook is invoked in case to a system halting error before
+ * the system is halted.
+ */
+#if !defined(SYSTEM_HALT_HOOK) || defined(__DOXYGEN__)
+#define SYSTEM_HALT_HOOK() { \
+ /* System halt code here.*/ \
+}
+#endif
+
+/** @} */
+
+/*===========================================================================*/
+/* Port-specific settings (override port settings defaulted in chcore.h). */
+/*===========================================================================*/
+
+#endif /* _CHCONF_H_ */
+
+/** @} */
diff --git a/demos/STM8S-STM8S208-RC/halconf.h b/demos/STM8S-STM8S208-RC/halconf.h new file mode 100644 index 000000000..3858828e6 --- /dev/null +++ b/demos/STM8S-STM8S208-RC/halconf.h @@ -0,0 +1,312 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/**
+ * @file templates/halconf.h
+ * @brief HAL configuration header.
+ * @details HAL configuration file, this file allows to enable or disable the
+ * various device drivers from your application. You may also use
+ * this file in order to override the device drivers default settings.
+ *
+ * @addtogroup HAL_CONF
+ * @{
+ */
+
+#ifndef _HALCONF_H_
+#define _HALCONF_H_
+
+#include "mcuconf.h"
+
+/**
+ * @brief Enables the TM subsystem.
+ */
+#if !defined(HAL_USE_TM) || defined(__DOXYGEN__)
+#define HAL_USE_TM FALSE
+#endif
+
+/**
+ * @brief Enables the PAL subsystem.
+ */
+#if !defined(HAL_USE_PAL) || defined(__DOXYGEN__)
+#define HAL_USE_PAL TRUE
+#endif
+
+/**
+ * @brief Enables the ADC subsystem.
+ */
+#if !defined(HAL_USE_ADC) || defined(__DOXYGEN__)
+#define HAL_USE_ADC FALSE
+#endif
+
+/**
+ * @brief Enables the CAN subsystem.
+ */
+#if !defined(HAL_USE_CAN) || defined(__DOXYGEN__)
+#define HAL_USE_CAN FALSE
+#endif
+
+/**
+ * @brief Enables the EXT subsystem.
+ */
+#if !defined(HAL_USE_EXT) || defined(__DOXYGEN__)
+#define HAL_USE_EXT FALSE
+#endif
+
+/**
+ * @brief Enables the GPT subsystem.
+ */
+#if !defined(HAL_USE_GPT) || defined(__DOXYGEN__)
+#define HAL_USE_GPT FALSE
+#endif
+
+/**
+ * @brief Enables the I2C subsystem.
+ */
+#if !defined(HAL_USE_I2C) || defined(__DOXYGEN__)
+#define HAL_USE_I2C FALSE
+#endif
+
+/**
+ * @brief Enables the ICU subsystem.
+ */
+#if !defined(HAL_USE_ICU) || defined(__DOXYGEN__)
+#define HAL_USE_ICU FALSE
+#endif
+
+/**
+ * @brief Enables the MAC subsystem.
+ */
+#if !defined(HAL_USE_MAC) || defined(__DOXYGEN__)
+#define HAL_USE_MAC FALSE
+#endif
+
+/**
+ * @brief Enables the MMC_SPI subsystem.
+ */
+#if !defined(HAL_USE_MMC_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_MMC_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the PWM subsystem.
+ */
+#if !defined(HAL_USE_PWM) || defined(__DOXYGEN__)
+#define HAL_USE_PWM FALSE
+#endif
+
+/**
+ * @brief Enables the RTC subsystem.
+ */
+#if !defined(HAL_USE_RTC) || defined(__DOXYGEN__)
+#define HAL_USE_RTC FALSE
+#endif
+
+/**
+ * @brief Enables the SDC subsystem.
+ */
+#if !defined(HAL_USE_SDC) || defined(__DOXYGEN__)
+#define HAL_USE_SDC FALSE
+#endif
+
+/**
+ * @brief Enables the SERIAL subsystem.
+ */
+#if !defined(HAL_USE_SERIAL) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL TRUE
+#endif
+
+/**
+ * @brief Enables the SERIAL over USB subsystem.
+ */
+#if !defined(HAL_USE_SERIAL_USB) || defined(__DOXYGEN__)
+#define HAL_USE_SERIAL_USB FALSE
+#endif
+
+/**
+ * @brief Enables the SPI subsystem.
+ */
+#if !defined(HAL_USE_SPI) || defined(__DOXYGEN__)
+#define HAL_USE_SPI FALSE
+#endif
+
+/**
+ * @brief Enables the UART subsystem.
+ */
+#if !defined(HAL_USE_UART) || defined(__DOXYGEN__)
+#define HAL_USE_UART FALSE
+#endif
+
+/**
+ * @brief Enables the USB subsystem.
+ */
+#if !defined(HAL_USE_USB) || defined(__DOXYGEN__)
+#define HAL_USE_USB FALSE
+#endif
+
+/*===========================================================================*/
+/* ADC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_WAIT) || defined(__DOXYGEN__)
+#define ADC_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p adcAcquireBus() and @p adcReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(ADC_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define ADC_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* CAN driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Sleep mode related APIs inclusion switch.
+ */
+#if !defined(CAN_USE_SLEEP_MODE) || defined(__DOXYGEN__)
+#define CAN_USE_SLEEP_MODE TRUE
+#endif
+
+/*===========================================================================*/
+/* I2C driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables the mutual exclusion APIs on the I2C bus.
+ */
+#if !defined(I2C_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define I2C_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+/*===========================================================================*/
+/* MAC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_ZERO_COPY) || defined(__DOXYGEN__)
+#define MAC_USE_ZERO_COPY FALSE
+#endif
+
+/**
+ * @brief Enables an event sources for incoming packets.
+ */
+#if !defined(MAC_USE_EVENTS) || defined(__DOXYGEN__)
+#define MAC_USE_EVENTS TRUE
+#endif
+
+/*===========================================================================*/
+/* MMC_SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ * This option is recommended also if the SPI driver does not
+ * use a DMA channel and heavily loads the CPU.
+ */
+#if !defined(MMC_NICE_WAITING) || defined(__DOXYGEN__)
+#define MMC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SDC driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Number of initialization attempts before rejecting the card.
+ * @note Attempts are performed at 10mS intervals.
+ */
+#if !defined(SDC_INIT_RETRY) || defined(__DOXYGEN__)
+#define SDC_INIT_RETRY 100
+#endif
+
+/**
+ * @brief Include support for MMC cards.
+ * @note MMC support is not yet implemented so this option must be kept
+ * at @p FALSE.
+ */
+#if !defined(SDC_MMC_SUPPORT) || defined(__DOXYGEN__)
+#define SDC_MMC_SUPPORT FALSE
+#endif
+
+/**
+ * @brief Delays insertions.
+ * @details If enabled this options inserts delays into the MMC waiting
+ * routines releasing some extra CPU time for the threads with
+ * lower priority, this may slow down the driver a bit however.
+ */
+#if !defined(SDC_NICE_WAITING) || defined(__DOXYGEN__)
+#define SDC_NICE_WAITING TRUE
+#endif
+
+/*===========================================================================*/
+/* SERIAL driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Default bit rate.
+ * @details Configuration parameter, this is the baud rate selected for the
+ * default configuration.
+ */
+#if !defined(SERIAL_DEFAULT_BITRATE) || defined(__DOXYGEN__)
+#define SERIAL_DEFAULT_BITRATE 38400
+#endif
+
+/**
+ * @brief Serial buffers size.
+ * @details Configuration parameter, you can change the depth of the queue
+ * buffers depending on the requirements of your application.
+ * @note The default is 64 bytes for both the transmission and receive
+ * buffers.
+ */
+#if !defined(SERIAL_BUFFERS_SIZE) || defined(__DOXYGEN__)
+#define SERIAL_BUFFERS_SIZE 16
+#endif
+
+/*===========================================================================*/
+/* SPI driver related settings. */
+/*===========================================================================*/
+
+/**
+ * @brief Enables synchronous APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_WAIT) || defined(__DOXYGEN__)
+#define SPI_USE_WAIT TRUE
+#endif
+
+/**
+ * @brief Enables the @p spiAcquireBus() and @p spiReleaseBus() APIs.
+ * @note Disabling this option saves both code and data space.
+ */
+#if !defined(SPI_USE_MUTUAL_EXCLUSION) || defined(__DOXYGEN__)
+#define SPI_USE_MUTUAL_EXCLUSION TRUE
+#endif
+
+#endif /* _HALCONF_H_ */
+
+/** @} */
diff --git a/demos/STM8S-STM8S208-RC/main.c b/demos/STM8S-STM8S208-RC/main.c new file mode 100644 index 000000000..f9b18dc71 --- /dev/null +++ b/demos/STM8S-STM8S208-RC/main.c @@ -0,0 +1,73 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+#include "ch.h"
+#include "hal.h"
+#include "test.h"
+
+/*
+ * LEDs blinker thread, times are in milliseconds.
+ */
+static WORKING_AREA(waThread1, 64);
+static msg_t Thread1(void *arg) {
+
+ (void)arg;
+ chRegSetThreadName("blinker");
+ while (TRUE) {
+ palClearPad(IOPORT2, PB_LED(7));
+ chThdSleepMilliseconds(500);
+ palSetPad(IOPORT2, PB_LED(7));
+ chThdSleepMilliseconds(500);
+ }
+ return 0;
+}
+
+/*
+ * Application entry point.
+ */
+void main(void) {
+
+ /*
+ * System initializations.
+ * - HAL initialization, this also initializes the configured device drivers
+ * and performs the board-specific initializations.
+ * - Kernel initialization, the main() function becomes a thread and the
+ * RTOS is active.
+ */
+ halInit();
+ chSysInit();
+
+ /*
+ * Activates the serial driver 1 using the driver default configuration.
+ */
+ sdStart(&SD1, NULL);
+
+ /*
+ * Creates the blinker thread.
+ */
+ chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO, Thread1, NULL);
+
+ /*
+ * Normal main() thread activity.
+ */
+ while (TRUE) {
+ if (palReadPad(IOPORT7, PG_BT5) == PAL_LOW)
+ TestThread(&SD1);
+ if (palReadPad(IOPORT7, PG_BT6) == PAL_LOW)
+ sdWriteTimeout(&SD1, "Hello World!\r\n", 14, TIME_INFINITE);
+ chThdSleepMilliseconds(1000);
+ }
+}
diff --git a/demos/STM8S-STM8S208-RC/mcuconf.h b/demos/STM8S-STM8S208-RC/mcuconf.h new file mode 100644 index 000000000..375b1b35f --- /dev/null +++ b/demos/STM8S-STM8S208-RC/mcuconf.h @@ -0,0 +1,47 @@ +/*
+ ChibiOS/RT - Copyright (C) 2006-2013 Giovanni Di Sirio
+
+ Licensed under the Apache License, Version 2.0 (the "License");
+ you may not use this file except in compliance with the License.
+ You may obtain a copy of the License at
+
+ http://www.apache.org/licenses/LICENSE-2.0
+
+ Unless required by applicable law or agreed to in writing, software
+ distributed under the License is distributed on an "AS IS" BASIS,
+ WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ See the License for the specific language governing permissions and
+ limitations under the License.
+*/
+
+/*
+ * STM8 drivers configuration.
+ * The following settings override the default settings present in
+ * the various device driver implementation headers.
+ * Note that the settings for each driver only have effect if the driver
+ * is enabled in halconf.h.
+ */
+
+/*
+ * HAL general settings.
+ */
+#define STM8S_NO_CLOCK_INIT FALSE
+#define STM8S_HSI_ENABLED TRUE
+#define STM8S_LSI_ENABLED TRUE
+#define STM8S_HSE_ENABLED FALSE
+#define STM8S_SYSCLK_SOURCE CLK_SYSSEL_HSI
+#define STM8S_HSI_DIVIDER CLK_HSI_DIV1
+#define STM8S_CPU_DIVIDER CLK_CPU_DIV1
+
+/*
+ * SERIAL driver system settings.
+ */
+#define STM8S_SERIAL_USE_UART1 TRUE
+#define STM8S_SERIAL_USE_UART2 FALSE
+#define STM8S_SERIAL_USE_UART3 FALSE
+
+/*
+ * SPI driver system settings.
+ */
+#define STM8S_SPI_USE_SPI TRUE
+#define STM8S_SPI_ERROR_HOOK(spip) chSysHalt()
diff --git a/demos/STM8S-STM8S208-RC/readme.txt b/demos/STM8S-STM8S208-RC/readme.txt new file mode 100644 index 000000000..011f75c56 --- /dev/null +++ b/demos/STM8S-STM8S208-RC/readme.txt @@ -0,0 +1,16 @@ +*****************************************************************************
+** ChibiOS/RT demo for STM8S208RB. **
+*****************************************************************************
+
+** TARGET **
+
+The demo runs on a Raisonance REva+STM8S208RB board.
+
+** The Demo **
+
+The demo flashes the board LED using a thread, by pressing the button located
+on the board the test procedure is activated with output on the serial port.
+
+** Build Procedure **
+
+From withing the Ride7 IDE open the project, compile and run it.
|