diff options
Diffstat (limited to 'os/hal/platforms/STM32/serial_lld.h')
| -rw-r--r-- | os/hal/platforms/STM32/serial_lld.h | 30 |
1 files changed, 18 insertions, 12 deletions
diff --git a/os/hal/platforms/STM32/serial_lld.h b/os/hal/platforms/STM32/serial_lld.h index eb6764bb5..1fee0e879 100644 --- a/os/hal/platforms/STM32/serial_lld.h +++ b/os/hal/platforms/STM32/serial_lld.h @@ -72,7 +72,7 @@ * @note The default is @p FALSE.
*/
#if !defined(USE_STM32_UART4) || defined(__DOXYGEN__)
-#define USE_STM32_UART4 TRUE
+#define USE_STM32_UART4 TRUE
#endif
/**
@@ -81,51 +81,57 @@ * @note The default is @p FALSE.
*/
#if !defined(USE_STM32_USART3) || defined(__DOXYGEN__)
-#define USE_STM32_UART5 TRUE
+#define USE_STM32_UART5 TRUE
#endif
#endif
/**
* @brief USART1 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_USART1_PRIORITY > @p PRIORITY_PENDSV.
+ * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART1_PRIORITY >
+ * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_USART1_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_USART1_PRIORITY 0xC0
+#define STM32_USART1_PRIORITY CORTEX_PRIORITY(12)
#endif
/**
* @brief USART2 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV.
+ * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY >
+ * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_USART2_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_USART2_PRIORITY 0xC0
+#define STM32_USART2_PRIORITY CORTEX_PRIORITY(12)
#endif
/**
* @brief USART3 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_USART3_PRIORITY > @p PRIORITY_PENDSV.
+ * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART3_PRIORITY >
+ * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_USART3_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_USART3_PRIORITY 0xC0
+#define STM32_USART3_PRIORITY CORTEX_PRIORITY(12)
#endif
#if defined(STM32F10X_HD) || defined(STM32F10X_CL) || defined(__DOXYGEN__)
/**
* @brief UART4 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV.
+ * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY >
+ * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_UART4_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART4_PRIORITY 0xC0
+#define STM32_UART4_PRIORITY CORTEX_PRIORITY(12)
#endif
/**
* @brief UART5 interrupt priority level setting.
- * @note @p BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY > @p PRIORITY_PENDSV.
+ * @note @p CORTEX_BASEPRI_KERNEL >= @p STM32_USART2_PRIORITY >
+ * @p CORTEX_PRIORITY_PENDSV.
*/
#if !defined(STM32_UART5_PRIORITY) || defined(__DOXYGEN__)
-#define STM32_UART5_PRIORITY 0xC0
+#define STM32_UART5_PRIORITY CORTEX_PRIORITY(12)
#endif
#endif
+
/*===========================================================================*/
/* Derived constants and error checks. */
/*===========================================================================*/
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