1 files changed, 14 insertions, 14 deletions
diff --git a/os/hal/platforms/STM32F1xx/stm32_dma.c b/os/hal/platforms/STM32F1xx/stm32_dma.c
index 5f94f3392..d4141d114 100644
--- a/os/hal/platforms/STM32F1xx/stm32_dma.c
+++ b/os/hal/platforms/STM32F1xx/stm32_dma.c
@@ -129,7 +129,7 @@ CH_IRQ_HANDLER(DMA1_Ch1_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA1->ISR >> 0) & STM32_DMA_ISR_MASK;
-  DMA1->IFCR = STM32_DMA_ISR_MASK << 0;
+  DMA1->IFCR = flags << 0;
   if (dma_isr_redir[0].dma_func)
     dma_isr_redir[0].dma_func(dma_isr_redir[0].dma_param, flags);
 
@@ -147,7 +147,7 @@ CH_IRQ_HANDLER(DMA1_Ch2_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA1->ISR >> 4) & STM32_DMA_ISR_MASK;
-  DMA1->IFCR = STM32_DMA_ISR_MASK << 4;
+  DMA1->IFCR = flags << 4;
   if (dma_isr_redir[1].dma_func)
     dma_isr_redir[1].dma_func(dma_isr_redir[1].dma_param, flags);
 
@@ -165,7 +165,7 @@ CH_IRQ_HANDLER(DMA1_Ch3_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA1->ISR >> 8) & STM32_DMA_ISR_MASK;
-  DMA1->IFCR = STM32_DMA_ISR_MASK << 8;
+  DMA1->IFCR = flags << 8;
   if (dma_isr_redir[2].dma_func)
     dma_isr_redir[2].dma_func(dma_isr_redir[2].dma_param, flags);
 
@@ -183,7 +183,7 @@ CH_IRQ_HANDLER(DMA1_Ch4_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA1->ISR >> 12) & STM32_DMA_ISR_MASK;
-  DMA1->IFCR = STM32_DMA_ISR_MASK << 12;
+  DMA1->IFCR = flags << 12;
   if (dma_isr_redir[3].dma_func)
     dma_isr_redir[3].dma_func(dma_isr_redir[3].dma_param, flags);
 
@@ -201,7 +201,7 @@ CH_IRQ_HANDLER(DMA1_Ch5_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA1->ISR >> 16) & STM32_DMA_ISR_MASK;
-  DMA1->IFCR = STM32_DMA_ISR_MASK << 16;
+  DMA1->IFCR = flags << 16;
   if (dma_isr_redir[4].dma_func)
     dma_isr_redir[4].dma_func(dma_isr_redir[4].dma_param, flags);
 
@@ -219,7 +219,7 @@ CH_IRQ_HANDLER(DMA1_Ch6_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA1->ISR >> 20) & STM32_DMA_ISR_MASK;
-  DMA1->IFCR = STM32_DMA_ISR_MASK << 20;
+  DMA1->IFCR = flags << 20;
   if (dma_isr_redir[5].dma_func)
     dma_isr_redir[5].dma_func(dma_isr_redir[5].dma_param, flags);
 
@@ -237,7 +237,7 @@ CH_IRQ_HANDLER(DMA1_Ch7_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA1->ISR >> 24) & STM32_DMA_ISR_MASK;
-  DMA1->IFCR = STM32_DMA_ISR_MASK << 24;
+  DMA1->IFCR = flags << 24;
   if (dma_isr_redir[6].dma_func)
     dma_isr_redir[6].dma_func(dma_isr_redir[6].dma_param, flags);
 
@@ -256,7 +256,7 @@ CH_IRQ_HANDLER(DMA2_Ch1_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA2->ISR >> 0) & STM32_DMA_ISR_MASK;
-  DMA2->IFCR = STM32_DMA_ISR_MASK << 0;
+  DMA2->IFCR = flags << 0;
   if (dma_isr_redir[7].dma_func)
     dma_isr_redir[7].dma_func(dma_isr_redir[7].dma_param, flags);
 
@@ -274,7 +274,7 @@ CH_IRQ_HANDLER(DMA2_Ch2_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA2->ISR >> 4) & STM32_DMA_ISR_MASK;
-  DMA2->IFCR = STM32_DMA_ISR_MASK << 4;
+  DMA2->IFCR = flags << 4;
   if (dma_isr_redir[8].dma_func)
     dma_isr_redir[8].dma_func(dma_isr_redir[8].dma_param, flags);
 
@@ -292,7 +292,7 @@ CH_IRQ_HANDLER(DMA2_Ch3_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA2->ISR >> 8) & STM32_DMA_ISR_MASK;
-  DMA2->IFCR = STM32_DMA_ISR_MASK << 8;
+  DMA2->IFCR = flags << 8;
   if (dma_isr_redir[9].dma_func)
     dma_isr_redir[9].dma_func(dma_isr_redir[9].dma_param, flags);
 
@@ -311,7 +311,7 @@ CH_IRQ_HANDLER(DMA2_Ch4_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA2->ISR >> 12) & STM32_DMA_ISR_MASK;
-  DMA2->IFCR = STM32_DMA_ISR_MASK << 12;
+  DMA2->IFCR = flags << 12;
   if (dma_isr_redir[10].dma_func)
     dma_isr_redir[10].dma_func(dma_isr_redir[10].dma_param, flags);
 
@@ -329,7 +329,7 @@ CH_IRQ_HANDLER(DMA2_Ch5_IRQHandler) {
   CH_IRQ_PROLOGUE();
 
   flags = (DMA2->ISR >> 16) & STM32_DMA_ISR_MASK;
-  DMA2->IFCR = STM32_DMA_ISR_MASK << 16;
+  DMA2->IFCR = flags << 16;
   if (dma_isr_redir[11].dma_func)
     dma_isr_redir[11].dma_func(dma_isr_redir[11].dma_param, flags);
 
@@ -351,7 +351,7 @@ CH_IRQ_HANDLER(DMA2_Ch4_5_IRQHandler) {
   /* Check on channel 4.*/
   flags = (DMA2->ISR >> 12) & STM32_DMA_ISR_MASK;
   if (flags & STM32_DMA_ISR_MASK) {
-    DMA2->IFCR = STM32_DMA_ISR_MASK << 12;
+    DMA2->IFCR = flags << 12;
     if (dma_isr_redir[10].dma_func)
       dma_isr_redir[10].dma_func(dma_isr_redir[10].dma_param, flags);
   }
@@ -359,7 +359,7 @@ CH_IRQ_HANDLER(DMA2_Ch4_5_IRQHandler) {
   /* Check on channel 5.*/
   flags = (DMA2->ISR >> 16) & STM32_DMA_ISR_MASK;
   if (flags & STM32_DMA_ISR_MASK) {
-    DMA2->IFCR = STM32_DMA_ISR_MASK << 16;
+    DMA2->IFCR = flags << 16;
     if (dma_isr_redir[11].dma_func)
       dma_isr_redir[11].dma_func(dma_isr_redir[11].dma_param, flags);
   }