diff options
Diffstat (limited to 'os/hal/platforms')
| -rw-r--r-- | os/hal/platforms/SPC56ELxx/hal_lld.c | 26 | ||||
| -rw-r--r-- | os/hal/platforms/SPC56ELxx/hal_lld.h | 7 |
2 files changed, 33 insertions, 0 deletions
diff --git a/os/hal/platforms/SPC56ELxx/hal_lld.c b/os/hal/platforms/SPC56ELxx/hal_lld.c index af465bf92..ffd2121bc 100644 --- a/os/hal/platforms/SPC56ELxx/hal_lld.c +++ b/os/hal/platforms/SPC56ELxx/hal_lld.c @@ -109,6 +109,32 @@ void spc_early_init(void) { #if !SPC5_NO_INIT
+#if SPC5_DISABLE_WATCHDOG
+ /* SWT disabled.*/
+ SWT.SR.R = 0xC520;
+ SWT.SR.R = 0xD928;
+ SWT.CR.R = 0xFF00000A;
+#endif
+
+ /* Enabling peripheral bridges to allow any operation.*/
+ AIPS.MPROT.R = 0x77777777;
+ AIPS.PACR0_7.R = 0;
+ AIPS.PACR8_15.R = 0;
+ AIPS.PACR16_23.R = 0;
+ AIPS.PACR24_31.R = 0;
+ AIPS.OPACR0_7.R = 0;
+ AIPS.OPACR8_15.R = 0;
+ AIPS.OPACR16_23.R = 0;
+ AIPS.OPACR24_31.R = 0;
+ AIPS.OPACR32_39.R = 0;
+ AIPS.OPACR40_47.R = 0;
+ AIPS.OPACR48_55.R = 0;
+ AIPS.OPACR56_63.R = 0;
+ AIPS.OPACR64_71.R = 0;
+ AIPS.OPACR72_79.R = 0;
+ AIPS.OPACR80_87.R = 0;
+ AIPS.OPACR88_95.R = 0;
+
/* SSCM initialization. Setting up the most restrictive handling of
invalid accesses to peripherals.*/
SSCM.ERROR.R = 3; /* PAE and RAE bits. */
diff --git a/os/hal/platforms/SPC56ELxx/hal_lld.h b/os/hal/platforms/SPC56ELxx/hal_lld.h index 7e0fb8aae..06970bec0 100644 --- a/os/hal/platforms/SPC56ELxx/hal_lld.h +++ b/os/hal/platforms/SPC56ELxx/hal_lld.h @@ -242,6 +242,13 @@ #endif
/**
+ * @brief Disables the watchdog on start.
+ */
+#if !defined(SPC5_DISABLE_WATCHDOG) || defined(__DOXYGEN__)
+#define SPC5_DISABLE_WATCHDOG TRUE
+#endif
+
+/**
* @brief FMPLL0 Clock source.
*/
#if !defined(SPC5_FMPLL0_CLK_SRC) || defined(__DOXYGEN__)
|