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/*
    ChibiOS - Copyright (C) 2006..2018 Giovanni Di Sirio

    Licensed under the Apache License, Version 2.0 (the "License");
    you may not use this file except in compliance with the License.
    You may obtain a copy of the License at

        http://www.apache.org/licenses/LICENSE-2.0

    Unless required by applicable law or agreed to in writing, software
    distributed under the License is distributed on an "AS IS" BASIS,
    WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
    See the License for the specific language governing permissions and
    limitations under the License.
*/

#include <string.h>

#include "ch.h"
#include "hal.h"

/**
 * DMA operation timeout failure handler.
 */
static void tmo(void *p) {

  chSysHalt((const char *)p);
}

/*--------------------------------------------------------------------------*/
/* ADC related code.                                                        */
/*--------------------------------------------------------------------------*/

#define ADC_GRP2_NUM_CHANNELS   8
#define ADC_GRP2_BUF_DEPTH      16

static virtual_timer_t adcvt;

static adcsample_t samples2[ADC_GRP2_NUM_CHANNELS * ADC_GRP2_BUF_DEPTH];

static void adccallback(ADCDriver *adcp, adcsample_t *buffer, size_t n) {

  (void)adcp;
  (void)buffer;
  (void)n;

  chSysLockFromISR();
  chVTSetI(&adcvt, TIME_MS2I(10), tmo, (void *)"ADC timeout");
  chSysUnlockFromISR();
}

static void adcerrorcallback(ADCDriver *adcp, adcerror_t err) {

  (void)adcp;
  (void)err;
  chSysHalt("ADC error");
}

/*
 * ADC conversion group.
 * Mode:        Continuous, 16 samples of 8 channels, SW triggered.
 * Channels:    IN11, IN12, IN11, IN12, IN11, IN12, Sensor, VRef.
 */
static const ADCConversionGroup adcgrpcfg2 = {
  TRUE,
  ADC_GRP2_NUM_CHANNELS,
  adccallback,
  adcerrorcallback,
  0,                        /* CR1 */
  ADC_CR2_SWSTART,          /* CR2 */
  ADC_SMPR1_SMP_AN12(ADC_SAMPLE_56) | ADC_SMPR1_SMP_AN11(ADC_SAMPLE_56) |
  ADC_SMPR1_SMP_SENSOR(ADC_SAMPLE_144) | ADC_SMPR1_SMP_VREF(ADC_SAMPLE_144),
  0,                        /* SMPR2 */
  ADC_SQR1_NUM_CH(ADC_GRP2_NUM_CHANNELS),
  ADC_SQR2_SQ8_N(ADC_CHANNEL_SENSOR) | ADC_SQR2_SQ7_N(ADC_CHANNEL_VREFINT),
  ADC_SQR3_SQ6_N(ADC_CHANNEL_IN12)   | ADC_SQR3_SQ5_N(ADC_CHANNEL_IN11) |
  ADC_SQR3_SQ4_N(ADC_CHANNEL_IN12)   | ADC_SQR3_SQ3_N(ADC_CHANNEL_IN11) |
  ADC_SQR3_SQ2_N(ADC_CHANNEL_IN12)   | ADC_SQR3_SQ1_N(ADC_CHANNEL_IN11)
};

/*--------------------------------------------------------------------------*/
/* SPI related code.                                                        */
/*--------------------------------------------------------------------------*/

/*
 * Maximum speed SPI configuration (21MHz, CPHA=0, CPOL=0, MSb first).
 */
static const SPIConfig hs_spicfg = {
  false,
  NULL,
  GPIOB,
  12,
  0,
  0
};

/*
 * SPI thread.
 */
static THD_WORKING_AREA(waSPI1, 1024);
static THD_WORKING_AREA(waSPI2, 1024);
static THD_WORKING_AREA(waSPI3, 1024);
static THD_FUNCTION(spi_thread, p) {
  unsigned i;
  SPIDriver *spip = (SPIDriver *)p;
  virtual_timer_t vt;
  uint8_t txbuf[256];
  uint8_t rxbuf[256];

  chRegSetThreadName("SPI overlord");

  chVTObjectInit(&vt);

  /* Prepare transmit pattern.*/
  for (i = 0; i < sizeof(txbuf); i++)
    txbuf[i] = (uint8_t)i;

  /* Continuous transmission.*/
  while (true) {
    /* Starts a VT working as watchdog to catch a malfunction in the SPI
       driver.*/
    chVTSet(&vt, TIME_MS2I(10), tmo, (void *)"SPI timeout");

    spiExchange(spip, sizeof(txbuf), txbuf, rxbuf);

    /* Stops the watchdog.*/
    chVTReset(&vt);
  }
}

/*--------------------------------------------------------------------------*/
/* Application code.                                                        */
/*--------------------------------------------------------------------------*/

/*
 * This is a periodic thread that does absolutely nothing except flashing
 * a LED. If the application fails then the LED stops flashing.
 */
static THD_WORKING_AREA(waThread1, 128);
static THD_FUNCTION(Thread1, arg) {

  (void)arg;
  chRegSetThreadName("blinker");
  while (true) {
    palSetPad(GPIOD, GPIOD_LED3);       /* Orange.  */
    chThdSleepMilliseconds(500);
    palClearPad(GPIOD, GPIOD_LED3);     /* Orange.  */
    chThdSleepMilliseconds(500);
  }
}

/*
 * Application entry point.
 */
int main(void) {
  unsigned i;
  static uint8_t patterns1[4096], patterns2[4096], buf1[4096], buf2[4096];

  /* System initializations.
     - HAL initialization, this also initializes the configured device drivers
       and performs the board-specific initializations.
     - Kernel initialization, the main() function becomes a thread and the
       RTOS is active.*/
  halInit();
  chSysInit();

  /* Creates the blinker thread.*/
  chThdCreateStatic(waThread1, sizeof(waThread1), NORMALPRIO + 10,
                    Thread1, NULL);

  /* Activates the ADC1 driver and the temperature sensor.*/
  adcStart(&ADCD1, NULL);
  adcSTM32EnableTSVREFE();

  /* Starts an ADC continuous conversion and its watchdog virtual timer.*/
  chVTSet(&adcvt, TIME_MS2I(10), tmo, (void *)"ADC timeout");
  adcStartConversion(&ADCD1, &adcgrpcfg2, samples2, ADC_GRP2_BUF_DEPTH);

  /* Activating SPI drivers.*/
  spiStart(&SPID1, &hs_spicfg);
  spiStart(&SPID2, &hs_spicfg);
  spiStart(&SPID3, &hs_spicfg);

  /* Starting SPI threads instances.*/
  chThdCreateStatic(waSPI1, sizeof(waSPI1), NORMALPRIO + 1, spi_thread, &SPID1);
  chThdCreateStatic(waSPI2, sizeof(waSPI2), NORMALPRIO + 1, spi_thread, &SPID2);
  chThdCreateStatic(waSPI3, sizeof(waSPI3), NORMALPRIO + 1, spi_thread, &SPID3);

  /* Allocating two DMA2 streams for memory copy operations.*/
  if (dmaStreamAllocate(STM32_DMA2_STREAM6, 0, NULL, NULL))
    chSysHalt("DMA already in use");
  if (dmaStreamAllocate(STM32_DMA2_STREAM7, 0, NULL, NULL))
    chSysHalt("DMA already in use");
  for (i = 0; i < sizeof (patterns1); i++)
    patterns1[i] = (uint8_t)i;
  for (i = 0; i < sizeof (patterns2); i++)
    patterns2[i] = (uint8_t)(i ^ 0xAA);

  /* Normal main() thread activity, it does continues memory copy operations
     using 2 DMA streams at the lowest priority.*/
  while (true) {
    virtual_timer_t vt;

    chVTObjectInit(&vt);

    /* Starts a VT working as watchdog to catch a malfunction in the DMA
       driver.*/
    chVTSet(&vt, TIME_MS2I(10), tmo, (void *)"copy timeout");

    /* Copy pattern 1.*/
    dmaStartMemCopy(STM32_DMA2_STREAM6,
                    STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE |
                                         STM32_DMA_CR_MSIZE_BYTE,
                    patterns1, buf1, sizeof (patterns1));
    dmaStartMemCopy(STM32_DMA2_STREAM7,
                    STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE |
                                         STM32_DMA_CR_MSIZE_BYTE,
                    patterns1, buf2, sizeof (patterns1));
    dmaWaitCompletion(STM32_DMA2_STREAM6);
    dmaWaitCompletion(STM32_DMA2_STREAM7);
    if (memcmp(patterns1, buf1, sizeof (patterns1)))
      chSysHalt("pattern error");
    if (memcmp(patterns1, buf2, sizeof (patterns1)))
      chSysHalt("pattern error");

    /* Copy pattern 2.*/
    dmaStartMemCopy(STM32_DMA2_STREAM6,
                    STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE |
                                         STM32_DMA_CR_MSIZE_BYTE,
                    patterns2, buf1, sizeof (patterns2));
    dmaStartMemCopy(STM32_DMA2_STREAM7,
                    STM32_DMA_CR_PL(0) | STM32_DMA_CR_PSIZE_BYTE |
                                         STM32_DMA_CR_MSIZE_BYTE,
                    patterns2, buf2, sizeof (patterns2));
    dmaWaitCompletion(STM32_DMA2_STREAM6);
    dmaWaitCompletion(STM32_DMA2_STREAM7);
    if (memcmp(patterns2, buf1, sizeof (patterns2)))
      chSysHalt("pattern error");
    if (memcmp(patterns2, buf2, sizeof (patterns2)))
      chSysHalt("pattern error");

    /* Stops the watchdog.*/
    chVTReset(&vt);

    chThdSleepMilliseconds(2);
  }
  return 0;
}
ile++; } return *this; } BelIterator operator++(int) { BelIterator prior(*this); ++(*this); return prior; } bool operator!=(const BelIterator &other) const { return cursor_index != other.cursor_index || cursor_tile != other.cursor_tile; } bool operator==(const BelIterator &other) const { return cursor_index == other.cursor_index && cursor_tile == other.cursor_tile; } BelId operator*() const { BelId ret; ret.location.x = cursor_tile % chip->width; ret.location.y = cursor_tile / chip->width; ret.index = cursor_index; return ret; } }; struct BelRange { BelIterator b, e; BelIterator begin() const { return b; } BelIterator end() const { return e; } }; // ----------------------------------------------------------------------- struct BelPinIterator { const BelPortPOD *ptr = nullptr; Location wire_loc; void operator++() { ptr++; } bool operator!=(const BelPinIterator &other) const { return ptr != other.ptr; } BelPin operator*() const { BelPin ret; ret.bel.index = ptr->bel_index; ret.bel.location = wire_loc + ptr->rel_bel_loc; ret.pin = ptr->port; return ret; } }; struct BelPinRange { BelPinIterator b, e; BelPinIterator begin() const { return b; } BelPinIterator end() const { return e; } }; // ----------------------------------------------------------------------- struct WireIterator { const ChipInfoPOD *chip; int cursor_index; int cursor_tile; WireIterator operator++() { cursor_index++; while (cursor_tile < chip->num_tiles && cursor_index >= chip->locations[chip->location_type[cursor_tile]].num_wires) { cursor_index = 0; cursor_tile++; } return *this; } WireIterator operator++(int) { WireIterator prior(*this); ++(*this); return prior; } bool operator!=(const WireIterator &other) const { return cursor_index != other.cursor_index || cursor_tile != other.cursor_tile; } bool operator==(const WireIterator &other) const { return cursor_index == other.cursor_index && cursor_tile == other.cursor_tile; } WireId operator*() const { WireId ret; ret.location.x = cursor_tile % chip->width; ret.location.y = cursor_tile / chip->width; ret.index = cursor_index; return ret; } }; struct WireRange { WireIterator b, e; WireIterator begin() const { return b; } WireIterator end() const { return e; } }; // ----------------------------------------------------------------------- struct AllPipIterator { const ChipInfoPOD *chip; int cursor_index; int cursor_tile; AllPipIterator operator++() { cursor_index++; while (cursor_tile < chip->num_tiles && cursor_index >= chip->locations[chip->location_type[cursor_tile]].num_pips) { cursor_index = 0; cursor_tile++; } return *this; } AllPipIterator operator++(int) { AllPipIterator prior(*this); ++(*this); return prior; } bool operator!=(const AllPipIterator &other) const { return cursor_index != other.cursor_index || cursor_tile != other.cursor_tile; } bool operator==(const AllPipIterator &other) const { return cursor_index == other.cursor_index && cursor_tile == other.cursor_tile; } PipId operator*() const { PipId ret; ret.location.x = cursor_tile % chip->width; ret.location.y = cursor_tile / chip->width; ret.index = cursor_index; return ret; } }; struct AllPipRange { AllPipIterator b, e; AllPipIterator begin() const { return b; } AllPipIterator end() const { return e; } }; // ----------------------------------------------------------------------- struct PipIterator { const PipLocatorPOD *cursor = nullptr; Location wire_loc; void operator++() { cursor++; } bool operator!=(const PipIterator &other) const { return cursor != other.cursor; } PipId operator*() const { PipId ret; ret.index = cursor->index; ret.location = wire_loc + cursor->rel_loc; return ret; } }; struct PipRange { PipIterator b, e; PipIterator begin() const { return b; } PipIterator end() const { return e; } }; struct ArchArgs { enum { NONE, LFE5U_25F, LFE5U_45F, LFE5U_85F, } type = NONE; std::string package; int speed = 6; }; struct Arch : BaseCtx { const ChipInfoPOD *chip_info; mutable std::unordered_map<IdString, BelId> bel_by_name; mutable std::unordered_map<IdString, WireId> wire_by_name; mutable std::unordered_map<IdString, PipId> pip_by_name; std::unordered_map<BelId, IdString> bel_to_cell; std::unordered_map<WireId, IdString> wire_to_net; std::unordered_map<PipId, IdString> pip_to_net; std::unordered_map<PipId, IdString> switches_locked; ArchArgs args; Arch(ArchArgs args); std::string getChipName(); IdString archId() const { return id("ecp5"); } IdString archArgsToId(ArchArgs args) const; IdString belTypeToId(BelType type) const; BelType belTypeFromId(IdString id) const; IdString portPinToId(PortPin type) const; PortPin portPinFromId(IdString id) const; // ------------------------------------------------- BelId getBelByName(IdString name) const; template <typename Id> const LocationTypePOD *locInfo(Id &id) const { return &(chip_info->locations[chip_info->location_type[id.location.y * chip_info->width + id.location.x]]); } IdString getBelName(BelId bel) const { NPNR_ASSERT(bel != BelId()); std::stringstream name; name << "X" << bel.location.x << "/Y" << bel.location.y << "/" << locInfo(bel)->bel_data[bel.index].name.get(); return id(name.str()); } uint32_t getBelChecksum(BelId bel) const { return bel.index; } void bindBel(BelId bel, IdString cell, PlaceStrength strength) { NPNR_ASSERT(bel != BelId()); NPNR_ASSERT(bel_to_cell[bel] == IdString()); bel_to_cell[bel] = cell; cells[cell]->bel = bel; cells[cell]->belStrength = strength; } void unbindBel(BelId bel) { NPNR_ASSERT(bel != BelId()); NPNR_ASSERT(bel_to_cell[bel] != IdString()); cells[bel_to_cell[bel]]->bel = BelId(); cells[bel_to_cell[bel]]->belStrength = STRENGTH_NONE; bel_to_cell[bel] = IdString(); } bool checkBelAvail(BelId bel) const { NPNR_ASSERT(bel != BelId()); return bel_to_cell.find(bel) == bel_to_cell.end() || bel_to_cell.at(bel) == IdString(); } IdString getBoundBelCell(BelId bel) const { NPNR_ASSERT(bel != BelId()); if (bel_to_cell.find(bel) == bel_to_cell.end()) return IdString(); else return bel_to_cell.at(bel); } IdString getConflictingBelCell(BelId bel) const { NPNR_ASSERT(bel != BelId()); if (bel_to_cell.find(bel) == bel_to_cell.end()) return IdString(); else return bel_to_cell.at(bel); } BelRange getBels() const { BelRange range; range.b.cursor_tile = 0; range.b.cursor_index = -1; range.b.chip = chip_info; ++range.b; //-1 and then ++ deals with the case of no Bels in the first tile range.e.cursor_tile = chip_info->width * chip_info->height; range.e.cursor_index = 0; range.e.chip = chip_info; return range; } BelRange getBelsByType(BelType type) const { BelRange range; // FIXME #if 0 if (type == "TYPE_A") { range.b.cursor = bels_type_a_begin; range.e.cursor = bels_type_a_end; } ... #endif return range; } BelRange getBelsAtSameTile(BelId bel) const; BelType getBelType(BelId bel) const { NPNR_ASSERT(bel != BelId()); return locInfo(bel)->bel_data[bel.index].type; } WireId getWireBelPin(BelId bel, PortPin pin) const; BelPin getBelPinUphill(WireId wire) const { BelPin ret; NPNR_ASSERT(wire != WireId()); if (locInfo(wire)->wire_data[wire.index].bel_uphill.bel_index >= 0) { ret.bel.index = locInfo(wire)->wire_data[wire.index].bel_uphill.bel_index; ret.bel.location = wire.location + locInfo(wire)->wire_data[wire.index].bel_uphill.rel_bel_loc; ret.pin = locInfo(wire)->wire_data[wire.index].bel_uphill.port; } return ret; } BelPinRange getBelPinsDownhill(WireId wire) const { BelPinRange range; NPNR_ASSERT(wire != WireId()); range.b.ptr = locInfo(wire)->wire_data[wire.index].bels_downhill.get(); range.b.wire_loc = wire.location; range.e.ptr = range.b.ptr + locInfo(wire)->wire_data[wire.index].num_bels_downhill; range.e.wire_loc = wire.location; return range; } // ------------------------------------------------- WireId getWireByName(IdString name) const; IdString getWireName(WireId wire) const { NPNR_ASSERT(wire != WireId()); std::stringstream name; name << "X" << wire.location.x << "/Y" << wire.location.y << "/" << locInfo(wire)->wire_data[wire.index].name.get(); return id(name.str()); } uint32_t getWireChecksum(WireId wire) const { return wire.index; } void bindWire(WireId wire, IdString net, PlaceStrength strength) { NPNR_ASSERT(wire != WireId()); NPNR_ASSERT(wire_to_net[wire] == IdString()); wire_to_net[wire] = net; nets[net]->wires[wire].pip = PipId(); nets[net]->wires[wire].strength = strength; } void unbindWire(WireId wire) { NPNR_ASSERT(wire != WireId()); NPNR_ASSERT(wire_to_net[wire] != IdString()); auto &net_wires = nets[wire_to_net[wire]]->wires; auto it = net_wires.find(wire); NPNR_ASSERT(it != net_wires.end()); auto pip = it->second.pip; if (pip != PipId()) { pip_to_net[pip] = IdString(); } net_wires.erase(it); wire_to_net[wire] = IdString(); } bool checkWireAvail(WireId wire) const { NPNR_ASSERT(wire != WireId()); return wire_to_net.find(wire) == wire_to_net.end() || wire_to_net.at(wire) == IdString(); } IdString getBoundWireNet(WireId wire) const { NPNR_ASSERT(wire != WireId()); if (wire_to_net.find(wire) == wire_to_net.end()) return IdString(); else return wire_to_net.at(wire); } IdString getConflictingWireNet(WireId wire) const { NPNR_ASSERT(wire != WireId()); if (wire_to_net.find(wire) == wire_to_net.end()) return IdString(); else return wire_to_net.at(wire); } WireRange getWires() const { WireRange range; range.b.cursor_tile = 0; range.b.cursor_index = -1; range.b.chip = chip_info; ++range.b; //-1 and then ++ deals with the case of no wries in the first tile range.e.cursor_tile = chip_info->width * chip_info->height; range.e.cursor_index = 0; range.e.chip = chip_info; return range; } // ------------------------------------------------- PipId getPipByName(IdString name) const; IdString getPipName(PipId pip) const; uint32_t getPipChecksum(PipId pip) const { return pip.index; } void bindPip(PipId pip, IdString net, PlaceStrength strength) { NPNR_ASSERT(pip != PipId()); NPNR_ASSERT(pip_to_net[pip] == IdString()); pip_to_net[pip] = net; WireId dst; dst.index = locInfo(pip)->pip_data[pip.index].dst_idx; dst.location = pip.location + locInfo(pip)->pip_data[pip.index].rel_dst_loc; NPNR_ASSERT(wire_to_net[dst] == IdString()); wire_to_net[dst] = net; nets[net]->wires[dst].pip = pip; nets[net]->wires[dst].strength = strength; } void unbindPip(PipId pip) { NPNR_ASSERT(pip != PipId()); NPNR_ASSERT(pip_to_net[pip] != IdString()); WireId dst; dst.index = locInfo(pip)->pip_data[pip.index].dst_idx; dst.location = pip.location + locInfo(pip)->pip_data[pip.index].rel_dst_loc; NPNR_ASSERT(wire_to_net[dst] != IdString()); wire_to_net[dst] = IdString(); nets[pip_to_net[pip]]->wires.erase(dst); pip_to_net[pip] = IdString(); } bool checkPipAvail(PipId pip) const { NPNR_ASSERT(pip != PipId()); return pip_to_net.find(pip) == pip_to_net.end() || pip_to_net.at(pip) == IdString(); } IdString getBoundPipNet(PipId pip) const { NPNR_ASSERT(pip != PipId()); if (pip_to_net.find(pip) == pip_to_net.end()) return IdString(); else return pip_to_net.at(pip); } IdString getConflictingPipNet(PipId pip) const { NPNR_ASSERT(pip != PipId()); if (pip_to_net.find(pip) == pip_to_net.end()) return IdString(); else return pip_to_net.at(pip); } AllPipRange getPips() const { AllPipRange range; range.b.cursor_tile = 0; range.b.cursor_index = -1; range.b.chip = chip_info; ++range.b; //-1 and then ++ deals with the case of no wries in the first tile range.e.cursor_tile = chip_info->width * chip_info->height; range.e.cursor_index = 0; range.e.chip = chip_info; return range; } WireId getPipSrcWire(PipId pip) const { WireId wire; NPNR_ASSERT(pip != PipId()); wire.index = locInfo(pip)->pip_data[pip.index].src_idx; wire.location = pip.location + locInfo(pip)->pip_data[pip.index].rel_src_loc; return wire; } WireId getPipDstWire(PipId pip) const { WireId wire; NPNR_ASSERT(pip != PipId()); wire.index = locInfo(pip)->pip_data[pip.index].dst_idx; wire.location = pip.location + locInfo(pip)->pip_data[pip.index].rel_dst_loc; return wire; } DelayInfo getPipDelay(PipId pip) const { DelayInfo delay; NPNR_ASSERT(pip != PipId()); delay.delay = locInfo(pip)->pip_data[pip.index].delay; return delay; } PipRange getPipsDownhill(WireId wire) const { PipRange range; NPNR_ASSERT(wire != WireId()); range.b.cursor = locInfo(wire)->wire_data[wire.index].pips_downhill.get(); range.b.wire_loc = wire.location; range.e.cursor = range.b.cursor + locInfo(wire)->wire_data[wire.index].num_downhill; range.e.wire_loc = wire.location; return range; } PipRange getPipsUphill(WireId wire) const { PipRange range; NPNR_ASSERT(wire != WireId()); range.b.cursor = locInfo(wire)->wire_data[wire.index].pips_uphill.get(); range.b.wire_loc = wire.location; range.e.cursor = range.b.cursor + locInfo(wire)->wire_data[wire.index].num_uphill; range.e.wire_loc = wire.location; return range; } PipRange getWireAliases(WireId wire) const { PipRange range; NPNR_ASSERT(wire != WireId()); range.b.cursor = nullptr; range.e.cursor = nullptr; return range; } std::string getPipTiletype(PipId pip) const { return chip_info->tiletype_names[locInfo(pip)->pip_data[pip.index].tile_type].get(); } int8_t getPipType(PipId pip) const { return locInfo(pip)->pip_data[pip.index].pip_type; } BelId getPackagePinBel(const std::string &pin) const; std::string getBelPackagePin(BelId bel) const; // ------------------------------------------------- GroupId getGroupByName(IdString name) const { return GroupId(); } IdString getGroupName(GroupId group) const { return IdString(); } std::vector<GroupId> getGroups() const { return std::vector<GroupId>(); } std::vector<BelId> getGroupBels(GroupId group) const { return std::vector<BelId>(); } std::vector<WireId> getGroupWires(GroupId group) const { return std::vector<WireId>(); } std::vector<PipId> getGroupPips(GroupId group) const { return std::vector<PipId>(); } std::vector<GroupId> getGroupGroups(GroupId group) const { return std::vector<GroupId>(); } // ------------------------------------------------- void estimatePosition(BelId bel, int &x, int &y, bool &gb) const; delay_t estimateDelay(WireId src, WireId dst) const; delay_t getDelayEpsilon() const { return 20; } delay_t getRipupDelayPenalty() const { return 200; } float getDelayNS(delay_t v) const { return v * 0.001; } uint32_t getDelayChecksum(delay_t v) const { return v; } // ------------------------------------------------- bool pack(); bool place(); bool route(); // ------------------------------------------------- std::vector<GraphicElement> getDecalGraphics(DecalId decal) const; DecalXY getFrameDecal() const; DecalXY getBelDecal(BelId bel) const; DecalXY getWireDecal(WireId wire) const; DecalXY getPipDecal(PipId pip) const; DecalXY getGroupDecal(GroupId group) const; // ------------------------------------------------- // Get the delay through a cell from one port to another, returning false // if no path exists bool getCellDelay(const CellInfo *cell, IdString fromPort, IdString toPort, delay_t &delay) const; // Get the associated clock to a port, or empty if the port is combinational IdString getPortClock(const CellInfo *cell, IdString port) const; // Return true if a port is a clock bool isClockPort(const CellInfo *cell, IdString port) const; // Return true if a port is a net bool isGlobalNet(const NetInfo *net) const; // ------------------------------------------------- // Placement validity checks bool isValidBelForCell(CellInfo *cell, BelId bel) const; bool isBelLocationValid(BelId bel) const; }; NEXTPNR_NAMESPACE_END