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authortmk <nobody@nowhere>2014-08-26 05:02:37 +0900
committertmk <nobody@nowhere>2014-08-26 05:02:37 +0900
commitb316f19871ab39e6a75146d74a3b5cca37165f3c (patch)
tree66d06b895fea2e85da612d06604ab59234dc46b7 /converter/ps2_usb/config.h
parent10eb70acb4c8a03fc5bda32d9c23fc41266aef7a (diff)
parent03fd4a6ff0fcccf8d7683b7fac3d9e6ae4fb635e (diff)
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Merge branch 'serial-mouse' of git://github.com/rhaberkorn/tmk_keyboard into rhaberkorn-serial-mouse
Diffstat (limited to 'converter/ps2_usb/config.h')
-rw-r--r--converter/ps2_usb/config.h40
1 files changed, 39 insertions, 1 deletions
diff --git a/converter/ps2_usb/config.h b/converter/ps2_usb/config.h
index c9bab1b07..5b644002d 100644
--- a/converter/ps2_usb/config.h
+++ b/converter/ps2_usb/config.h
@@ -69,7 +69,7 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#define PS2_DATA_PORT PORTD
#define PS2_DATA_PIN PIND
#define PS2_DATA_DDR DDRD
-#define PS2_DATA_BIT 2
+#define PS2_DATA_BIT 0
#define PS2_INT_INIT() do { \
EICRA |= ((1<<ISC11) | \
(0<<ISC10)); \
@@ -170,4 +170,42 @@ along with this program. If not, see <http://www.gnu.org/licenses/>.
#endif
#endif
+#ifdef SERIAL_MOUSE_MICROSOFT
+ /*
+ * Serial(USART) configuration (for Microsoft serial mice)
+ * asynchronous, positive logic, 1200baud, bit order: LSB first
+ * 1-start bit, 7-data bit, no parity, 1-stop bit
+ */
+ #define SERIAL_UART_BAUD 1200
+ #define SERIAL_UART_DATA UDR1
+ #define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
+ #define SERIAL_UART_RXD_VECT USART1_RX_vect
+ #define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
+ #define SERIAL_UART_INIT() do { \
+ UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
+ UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
+ UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
+ UCSR1C = (1<<UCSZ11) | (0<<UCSZ10); /* no parity, 1 stop bit, 7-bit characters */ \
+ sei(); \
+ } while(0)
+#elif defined(SERIAL_MOUSE_MOUSESYSTEMS)
+ /*
+ * Serial(USART) configuration (for Mousesystems serial mice)
+ * asynchronous, positive logic, 1200baud, bit order: LSB first
+ * 1-start bit, 8-data bit, no parity, 1-stop bit
+ */
+ #define SERIAL_UART_BAUD 1200
+ #define SERIAL_UART_DATA UDR1
+ #define SERIAL_UART_UBRR ((F_CPU/(16UL*SERIAL_UART_BAUD))-1)
+ #define SERIAL_UART_RXD_VECT USART1_RX_vect
+ #define SERIAL_UART_TXD_READY (UCSR1A&(1<<UDRE1))
+ #define SERIAL_UART_INIT() do { \
+ UBRR1L = (uint8_t) SERIAL_UART_UBRR; /* baud rate */ \
+ UBRR1H = (uint8_t) (SERIAL_UART_UBRR>>8); /* baud rate */ \
+ UCSR1B |= (1<<RXCIE1) | (1<<RXEN1); /* RX interrupt, RX: enable */ \
+ UCSR1C = (1<<UCSZ11) | (1<<UCSZ10); /* no parity, 1 stop bit, 8-bit characters */ \
+ sei(); \
+ } while(0)
+#endif
+
#endif