import os import subprocess if not os.path.exists("work_ff"): os.mkdir("work_ff") modules = [] with open("../cells_ff.vh", "r") as f: with open("work_ff/cells_ff_gate.v", "w") as g: for line in f: if not line.startswith("module"): g.write(line) continue else: spidx = line.find(" ") bridx = line.find("(") modname = line[spidx+1 : bridx] g.write("module %s_gate" % modname) g.write(line[bridx:]) inpidx = line.find("input ") outpidx = line.find(", output") modules.append((modname, [x.strip() for x in line[inpidx+6:outpidx].split(",")])) with open("work_ff/testbench.v", "w") as f: print(""" `timescale 1ns/ 1ps module testbench; reg pur = 0, clk, rst, cen, d; // Needed for Diamond sim models GSR GSR_INST (.GSR(1'b1)); PUR PUR_INST (.PUR(pur)); initial begin $dumpfile("work_ff/ffs.vcd"); $dumpvars(0, testbench); #5; pur = 1; #95; repeat (2500) begin {clk, rst, cen, d} = $random; #10; check_outputs; #1; end $finish; end """, file=f) for modname, inputs in modules: print(" wire %s_gold_q, %s_gate_q;" % (modname, modname), file=f) portconns = [] for inp in inputs: if inp in ("SCLK", "CK"): portconns.append(".%s(clk)" % inp) elif inp in ("CD", "PD"): portconns.append(".%s(rst)" % inp) elif inp == "SP": portconns.append(".%s(cen)" % inp) elif inp == "D": portconns.append(".%s(d)" % inp) else: assert False portconns.append(".Q(%s_gold_q)" % modname) print(" %s %s_gold_i (%s);" % (modname, modname, ", ".join(portconns)), file=f) portconns[-1] = (".Q(%s_gate_q)" % modname) print(" %s_gate %s_gate_i (%s);" % (modname, modname, ", ".join(portconns)), file=f) print("", file=f) print(" task check_outputs;", file=f) print(" begin", file=f) print(" if (%s_gold_q != %s_gate_q) $display(\"MISMATCH at %%1t: %s_gold_q=%%b, %s_gate_q=%%b\", $time, %s_gold_q, %s_gate_q);" % (modname, modname, modname, modname, modname, modname), file=f) print(" end", file=f) print(" endtask", file=f) print("endmodule", file=f) diamond_models = "/usr/local/diamond/3.10_x64/cae_library/simulation/verilog/ecp5u" subprocess.call(["iverilog", "-s", "testbench", "-o", "work_ff/testbench", "-Dmixed_hdl", "-DNO_INCLUDES", "-y", diamond_models, "work_ff/cells_ff_gate.v", "../cells_sim.v", "work_ff/testbench.v"]) subprocess.call(["vvp", "work_ff/testbench"]) >
path: root/lib/lufa/Projects/Webserver/Lib/uip/uip-split.h
blob: 0c768ce40ac2a45ed24cc211c9a229363caf5909 (plain)
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/*
 * Copyright (c) 2004, Swedish Institute of Computer Science.
 * All rights reserved.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions
 * are met:
 * 1. Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 * 2. Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the distribution.
 * 3. Neither the name of the Institute nor the names of its contributors
 *    may be used to endorse or promote products derived from this software
 *    without specific prior written permission.
 *
 * THIS SOFTWARE IS PROVIDED BY THE INSTITUTE AND CONTRIBUTORS ``AS IS'' AND
 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
 * ARE DISCLAIMED.  IN NO EVENT SHALL THE INSTITUTE OR CONTRIBUTORS BE LIABLE
 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
 * SUCH DAMAGE.
 *
 * This file is part of the Contiki operating system.
 *
 * Author: Adam Dunkels <adam@sics.se>
 *
 * $Id: uip-split.h,v 1.1 2006/06/17 22:41:19 adamdunkels Exp $
 */
/**
 * \addtogroup uip
 * @{
 */

/**
 * \defgroup uipsplit uIP TCP throughput booster hack
 * @{
 *
 * The basic uIP TCP implementation only allows each TCP connection to
 * have a single TCP segment in flight at any given time. Because of
 * the delayed ACK algorithm employed by most TCP receivers, uIP's
 * limit on the amount of in-flight TCP segments seriously reduces the
 * maximum achievable throughput for sending data from uIP.
 *
 * The uip-split module is a hack which tries to remedy this
 * situation. By splitting maximum sized outgoing TCP segments into
 * two, the delayed ACK algorithm is not invoked at TCP
 * receivers. This improves the throughput when sending data from uIP
 * by orders of magnitude.
 *
 * The uip-split module uses the uip-fw module (uIP IP packet
 * forwarding) for sending packets. Therefore, the uip-fw module must
 * be set up with the appropriate network interfaces for this module
 * to work.
 */


/**
 * \file
 * Module for splitting outbound TCP segments in two to avoid the
 * delayed ACK throughput degradation.
 * \author
 * Adam Dunkels <adam@sics.se>
 *
 */

#ifndef __UIP_SPLIT_H__
#define __UIP_SPLIT_H__

#include <string.h>
#include <uip.h>

#include "../../USBHostMode.h"

#include <LUFA/Drivers/USB/USB.h>

/**
 * Handle outgoing packets.
 *
 * This function inspects an outgoing packet in the uip_buf buffer and
 * sends it out using the uip_fw_output() function. If the packet is a
 * full-sized TCP segment it will be split into two segments and
 * transmitted separately. This function should be called instead of
 * the actual device driver output function, or the uip_fw_output()
 * function.
 *
 * The headers of the outgoing packet is assumed to be in the uip_buf
 * buffer and the payload is assumed to be wherever uip_appdata
 * points. The length of the outgoing packet is assumed to be in the
 * uip_len variable.
 *
 */
void uip_split_output(void);
void uip_add32(u8_t *op32, u16_t op16);
#endif /* __UIP_SPLIT_H__ */

/** @} */
/** @} */