tmk_core/common/bootmagic.c


1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137

#include <stdint.h>
#include <stdbool.h>
#include "wait.h"
#include "matrix.h"
#include "bootloader.h"
#include "debug.h"
#include "keymap.h"
#include "host.h"
#include "action_layer.h"
#include "eeconfig.h"
#include "bootmagic.h"

keymap_config_t keymap_config;

/** \brief Bootmagic
 *
 * FIXME: needs doc
 */
void bootmagic(void)
{
    /* check signature */
    if (!eeconfig_is_enabled()) {
        eeconfig_init();
    }

    /* do scans in case of bounce */
    print("bootmagic scan: ... ");
    uint8_t scan = 100;
    while (scan--) { matrix_scan(); wait_ms(10); }
    print("done.\n");

    /* bootmagic skip */
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_SKIP)) {
        return;
    }

    /* eeconfig clear */
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_EEPROM_CLEAR)) {
        eeconfig_init();
    }

    /* bootloader */
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_BOOTLOADER)) {
        bootloader_jump();
    }

    /* debug enable */
    debug_config.raw = eeconfig_read_debug();
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEBUG_ENABLE)) {
        if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEBUG_MATRIX)) {
            debug_config.matrix = !debug_config.matrix;
        } else if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEBUG_KEYBOARD)) {
            debug_config.keyboard = !debug_config.keyboard;
        } else if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEBUG_MOUSE)) {
            debug_config.mouse = !debug_config.mouse;
        } else {
            debug_config.enable = !debug_config.enable;
        }
    }
    eeconfig_update_debug(debug_config.raw);

    /* keymap config */
    keymap_config.raw = eeconfig_read_keymap();
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_SWAP_CONTROL_CAPSLOCK)) {
        keymap_config.swap_control_capslock = !keymap_config.swap_control_capslock;
    }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_CAPSLOCK_TO_CONTROL)) {
        keymap_config.capslock_to_control = !keymap_config.capslock_to_control;
    }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_SWAP_LALT_LGUI)) {
        keymap_config.swap_lalt_lgui = !keymap_config.swap_lalt_lgui;
    }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_SWAP_RALT_RGUI)) {
        keymap_config.swap_ralt_rgui = !keymap_config.swap_ralt_rgui;
    }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_NO_GUI)) {
        keymap_config.no_gui = !keymap_config.no_gui;
    }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_SWAP_GRAVE_ESC)) {
        keymap_config.swap_grave_esc = !keymap_config.swap_grave_esc;
    }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_SWAP_BACKSLASH_BACKSPACE)) {
        keymap_config.swap_backslash_backspace = !keymap_config.swap_backslash_backspace;
    }
    if (bootmagic_scan_keycode(BOOTMAGIC_HOST_NKRO)) {
        keymap_config.nkro = !keymap_config.nkro;
    }
    eeconfig_update_keymap(keymap_config.raw);

    /* default layer */
    uint8_t default_layer = 0;
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_0)) { default_layer |= (1<<0); }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_1)) { default_layer |= (1<<1); }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_2)) { default_layer |= (1<<2); }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_3)) { default_layer |= (1<<3); }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_4)) { default_layer |= (1<<4); }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_5)) { default_layer |= (1<<5); }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_6)) { default_layer |= (1<<6); }
    if (bootmagic_scan_keycode(BOOTMAGIC_KEY_DEFAULT_LAYER_7)) { default_layer |= (1<<7); }
    if (default_layer) {
        eeconfig_update_default_layer(default_layer);
        default_layer_set((uint32_t)default_layer);
    } else {
        default_layer = eeconfig_read_default_layer();
        default_layer_set((uint32_t)default_layer);
    }
}

/** \brief Scan Keycode
 *
 * FIXME: needs doc
 */
static bool scan_keycode(uint8_t keycode)
{
    for (uint8_t r = 0; r < MATRIX_ROWS; r++) {
        matrix_row_t matrix_row = matrix_get_row(r);
        for (uint8_t c = 0; c < MATRIX_COLS; c++) {
            if (matrix_row & ((matrix_row_t)1<<c)) {
                if (keycode == keymap_key_to_keycode(0, (keypos_t){ .row = r, .col = c })) {
                    return true;
                }
            }
        }
    }
    return false;
}

/** \brief Bootmagic Scan Keycode
 *
 * FIXME: needs doc
 */
bool bootmagic_scan_keycode(uint8_t keycode)
{
    if (!scan_keycode(BOOTMAGIC_KEY_SALT)) return false;

    return scan_keycode(keycode);
}
--  Nodes recognizer for ieee.vital_timing.
--  Copyright (C) 2002, 2003, 2004, 2005 Tristan Gingold
--
--  GHDL is free software; you can redistribute it and/or modify it under
--  the terms of the GNU General Public License as published by the Free
--  Software Foundation; either version 2, or (at your option) any later
--  version.
--
--  GHDL is distributed in the hope that it will be useful, but WITHOUT ANY
--  WARRANTY; without even the implied warranty of MERCHANTABILITY or
--  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
--  for more details.
--
--  You should have received a copy of the GNU General Public License
--  along with GHDL; see the file COPYING.  If not, write to the Free
--  Software Foundation, 59 Temple Place - Suite 330, Boston, MA
--  02111-1307, USA.
with Types; use Types;
with Std_Names;
with Errorout; use Errorout;
with Vhdl.Errors; use Vhdl.Errors;
with Vhdl.Std_Package; use Vhdl.Std_Package;
with Vhdl.Tokens; use Vhdl.Tokens;
with Name_Table;
with Vhdl.Ieee.Std_Logic_1164; use Vhdl.Ieee.Std_Logic_1164;
with Vhdl.Sem_Scopes;
with Vhdl.Sem_Specs;
with Vhdl.Evaluation;
with Vhdl.Sem;
with Vhdl.Utils;

package body Vhdl.Ieee.Vital_Timing is
   --  This package is based on IEEE 1076.4 1995.

   --  Control generics identifier.
   InstancePath_Id : Name_Id;
   TimingChecksOn_Id : Name_Id;
   XOn_Id : Name_Id;
   MsgOn_Id : Name_Id;

   --  Extract declarations from package IEEE.VITAL_Timing.
   procedure Extract_Declarations (Pkg : Iir_Package_Declaration)
   is
      Ill_Formed : exception;

      function Try_Get_Identifier (Str : String) return Name_Id
      is
         Id : Name_Id;
      begin
         Id := Name_Table.Get_Identifier_No_Create (Str);
         if Id = Null_Identifier then
            raise Ill_Formed;
         end if;
         return Id;
      end Try_Get_Identifier;

      use Name_Table;

      Decl : Iir;
      Id : Name_Id;

      VitalDelayType_Id : Name_Id;
      VitalDelayType01_Id   : Name_Id;
      VitalDelayType01Z_Id  : Name_Id;
      VitalDelayType01ZX_Id : Name_Id;

      VitalDelayArrayType_Id     : Name_Id;
      VitalDelayArrayType01_Id   : Name_Id;
      VitalDelayArrayType01Z_Id  : Name_Id;
      VitalDelayArrayType01ZX_Id : Name_Id;
   begin
      --  Get Vital delay type identifiers.
      VitalDelayType_Id     := Try_Get_Identifier ("vitaldelaytype");
      VitalDelayType01_Id   := Try_Get_Identifier ("vitaldelaytype01");
      VitalDelayType01Z_Id  := Try_Get_Identifier ("vitaldelaytype01z");
      VitalDelayType01ZX_Id := Try_Get_Identifier ("vitaldelaytype01zx");

      VitalDelayArrayType_Id    :=
        Try_Get_Identifier ("vitaldelayarraytype");
      VitalDelayArrayType01_Id  :=
        Try_Get_Identifier ("vitaldelayarraytype01");
      VitalDelayArrayType01Z_Id :=
        Try_Get_Identifier ("vitaldelayarraytype01z");
      VitalDelayArrayType01ZX_Id :=
        Try_Get_Identifier ("vitaldelayarraytype01zx");

      --  Iterate on every declaration.
      --  Do name-matching.
      Decl := Get_Declaration_Chain (Pkg);
      while Decl /= Null_Iir loop
         case Get_Kind (Decl) is
            when Iir_Kind_Attribute_Declaration =>
               Id := Get_Identifier (Decl);
               if Id = Std_Names.Name_VITAL_Level0 then
                  Vital_Level0_Attribute := Decl;
               elsif Id = Std_Names.Name_VITAL_Level1 then
                  Vital_Level1_Attribute := Decl;
               end if;
            when Iir_Kind_Subtype_Declaration =>
               Id := Get_Identifier (Decl);
               if Id = VitalDelayType_Id then
                  VitalDelayType := Get_Type (Decl);
               end if;
            when Iir_Kind_Type_Declaration =>
               Id := Get_Identifier (Decl);
               if Id = VitalDelayArrayType_Id then
                  VitalDelayArrayType := Get_Type_Definition (Decl);
               elsif Id = VitalDelayArrayType01_Id then
                  VitalDelayArrayType01 := Get_Type_Definition (Decl);
               elsif Id = VitalDelayArrayType01Z_Id then
                  VitalDelayArrayType01Z := Get_Type_Definition (Decl);
               elsif Id = VitalDelayArrayType01ZX_Id then
                  VitalDelayArrayType01ZX := Get_Type_Definition (Decl);
               end if;
            when Iir_Kind_Anonymous_Type_Declaration =>
               Id := Get_Identifier (Decl);
               if Id = VitalDelayType01_Id then
                  VitalDelayType01 := Get_Type_Definition (Decl);
               elsif Id = VitalDelayType01Z_Id then
                  VitalDelayType01Z := Get_Type_Definition (Decl);
               elsif Id = VitalDelayType01ZX_Id then
                  VitalDelayType01ZX := Get_Type_Definition (Decl);
               end if;
            when others =>
               null;
         end case;
         Decl := Get_Chain (Decl);
      end loop;

      --  If a declaration was not found, then the package is not the expected
      --  one.
      if Vital_Level0_Attribute = Null_Iir
        or Vital_Level1_Attribute = Null_Iir
        or VitalDelayType = Null_Iir
        or VitalDelayType01 = Null_Iir
        or VitalDelayType01Z = Null_Iir
        or VitalDelayType01ZX = Null_Iir
        or VitalDelayArrayType = Null_Iir
        or VitalDelayArrayType01 = Null_Iir
        or VitalDelayArrayType01Z = Null_Iir
        or VitalDelayArrayType01ZX = Null_Iir
      then
         raise Ill_Formed;
      end if;

      --  Create identifier for control generics.
      InstancePath_Id := Get_Identifier ("instancepath");
      TimingChecksOn_Id := Get_Identifier ("timingcheckson");
      XOn_Id := Get_Identifier ("xon");
      MsgOn_Id := Get_Identifier ("msgon");

      exception
         when Ill_Formed =>
            Error_Msg_Sem (+Pkg, "package ieee.vital_timing is ill-formed");

            Vital_Level0_Attribute := Null_Iir;
            Vital_Level1_Attribute := Null_Iir;

            VitalDelayType := Null_Iir;
            VitalDelayType01 := Null_Iir;
            VitalDelayType01Z := Null_Iir;
            VitalDelayType01ZX := Null_Iir;

            VitalDelayArrayType := Null_Iir;
            VitalDelayArrayType01 := Null_Iir;
            VitalDelayArrayType01Z := Null_Iir;
            VitalDelayArrayType01ZX := Null_Iir;
   end Extract_Declarations;

   procedure Error_Vital
     (Loc : Location_Type; Msg : String; Args : Earg_Arr := No_Eargs) is
   begin
      Error_Msg_Sem (Loc, Msg, Args);
   end Error_Vital;

   procedure Warning_Vital
     (Loc : Iir; Msg : String; Args : Earg_Arr := No_Eargs) is
   begin
      Warning_Msg_Sem (Warnid_Vital_Generic, +Loc, Msg, Args);
   end Warning_Vital;

   --  Check DECL is the VITAL level 0 attribute specification.
   procedure Check_Level0_Attribute_Specification (Decl : Iir)
   is
      Expr : Iir;
   begin
      if Get_Kind (Decl) /= Iir_Kind_Attribute_Specification
        or else (Get_Named_Entity (Get_Attribute_Designator (Decl))
                   /= Vital_Level0_Attribute)
      then
         Error_Vital
           (+Decl,
            "first declaration must be the VITAL attribute specification");
         return;
      end if;

      --  IEEE 1076.4 4.1
      --  The expression in the VITAL_Level0 attribute specification shall be
      --  the Boolean literal TRUE.
      Expr := Get_Expression (Decl);
      if Get_Kind (Expr) not in Iir_Kinds_Denoting_Name
        or else Get_Named_Entity (Expr) /= Boolean_True
      then
         Error_Vital
           (+Decl, "the expression in the VITAL_Level0 attribute "
              & "specification shall be the Boolean literal TRUE");
      end if;

      --  IEEE 1076.4 4.1
      --  The entity specification of the decorating attribute specification
      --  shall be such that the enclosing entity or architecture inherits the
      --  VITAL_Level0 attribute.
      case Get_Entity_Class (Decl) is
         when Tok_Entity
           | Tok_Architecture =>
            null;
         when others =>
            Error_Vital (+Decl, "VITAL attribute specification does not "
                           & "decorate the enclosing entity or architecture");
      end case;
   end Check_Level0_Attribute_Specification;

   procedure Check_Entity_Port_Declaration
     (Decl : Iir_Interface_Signal_Declaration)
   is
      use Name_Table;

      Name : constant String := Image (Get_Identifier (Decl));
      Atype : Iir;
      Base_Type : Iir;
      Type_Decl : Iir;
   begin
      --  IEEE 1076.4 4.3.1
      --  The identifiers in an entity port declaration shall not contain
      --  underscore characters.
      pragma Assert (Name'First = 1);
      if Name (1) = '/' then
         Error_Vital
           (+Decl, "VITAL entity port shall not be an extended identifier");
      end if;
      for I in Name'Range loop
         if Name (I) = '_' then
            Error_Vital
              (+Decl, "VITAL entity port shall not contain underscore");
            exit;
         end if;
      end loop;

      --  IEEE 1076.4 4.3.1
      --  A port that is declared in an entity port declaration shall not be
      --  of mode LINKAGE.
      if Get_Mode (Decl) = Iir_Linkage_Mode then
         Error_Vital (+Decl, "VITAL entity port shall not be of mode LINKAGE");
      end if;

      --  IEEE 1076.4 4.3.1
      --  The type mark in an entity port declaration shall denote a type or
      --  a subtype that is declared in package Std_Logic_1164.  The type
      --  mark in the declaration of a scalar port shall denote the subtype
      --  Std_Ulogic or a subtype of Std_Ulogic.  The type mark in the
      --  declaration of an array port shall denote the type Std_Logic_Vector.
      Atype := Get_Type (Decl);
      Base_Type := Get_Base_Type (Atype);
      Type_Decl := Get_Type_Declarator (Atype);
      if Base_Type = Std_Logic_Vector_Type then
         if Get_Resolution_Indication (Atype) /= Null_Iir then
            Error_Vital
              (+Decl,
               "VITAL array port type cannot override resolution function");
         end if;
         --  FIXME: is an unconstrained array port allowed ?
         --  FIXME: what about staticness of the index_constraint ?
      elsif Base_Type = Std_Ulogic_Type then
         if Type_Decl = Null_Iir
           or else Get_Parent (Type_Decl) /= Std_Logic_1164_Pkg
         then
            Error_Vital
              (+Decl,
               "VITAL entity port type mark shall be one of Std_Logic_1164");
         end if;
      else
         Error_Vital
           (+Decl, "VITAL port type must be Std_Logic_Vector or Std_Ulogic");
      end if;

      if Get_Guarded_Signal_Flag (Decl) then
         Error_Vital (+Decl, "VITAL entity port cannot be guarded");
      end if;
   end Check_Entity_Port_Declaration;

   procedure Check_Entity_Generic_Declaration
     (Decl : Iir_Interface_Constant_Declaration; Gen_Chain : Iir)
   is
      Id : constant Name_Id := Get_Identifier (Decl);
      Name : String := Name_Table.Image (Id);
      Len : constant Natural := Name'Last;

      --  Current position in the generic name, stored into Name.
      Gen_Name_Pos : Natural;

      --  Length of the generic name.
      Gen_Name_Length : Natural;

      --  The generic being analyzed.
      Gen_Decl : Iir;

      Port_Length : Natural;

      procedure Error_Vital_Name (Str : String)
      is
         Loc : Location_Type;
      begin
         Loc := Get_Location (Gen_Decl);
         Error_Vital (Loc + Location_Type (Gen_Name_Pos - 1), Str);
      end Error_Vital_Name;

      --  Check the next sub-string in the generic name is a port.
      --  Returns the port.
      function Check_Port return Iir
      is
         use Vhdl.Sem_Scopes;
         use Name_Table;

         C : Character;
         Res : Iir;
         Id : Name_Id;
         Inter : Name_Interpretation_Type;
      begin
         Port_Length := 0;
         while Gen_Name_Pos <= Gen_Name_Length loop
            C := Name (Gen_Name_Pos);
            Gen_Name_Pos := Gen_Name_Pos + 1;
            exit when C = '_';
            Port_Length := Port_Length + 1;
            Name (Port_Length) := C;
         end loop;

         if Port_Length = 0 then
            Error_Vital_Name ("port expected in VITAL generic name");
            return Null_Iir;
         end if;

         Id := Get_Identifier_No_Create (Name (1 .. Port_Length));
         Res := Null_Iir;
         if Id /= Null_Identifier then
            Inter := Get_Interpretation (Id);
            if Valid_Interpretation (Inter) then
               Res := Get_Declaration (Inter);
            end if;
         end if;
         if Res = Null_Iir then
            Warning_Vital (Gen_Decl, "'" & Name (1 .. Port_Length)
                             & "' is not a port name (in VITAL generic name)");
         end if;
         return Res;
      end Check_Port;

      --  Checks the port is an input port.
      function Check_Input_Port return Iir
      is
         Res : Iir;
      begin
         Res := Check_Port;
         if Res /= Null_Iir then
            --  IEEE 1076.4 4.3.2.1.3
            --  an input port is a VHDL port of mode IN or INOUT.
            case Get_Mode (Res) is
               when Iir_In_Mode
                 | Iir_Inout_Mode =>
                  null;
               when others =>
                  Error_Vital
                    (+Gen_Decl, "%i must be an input port", (1 => +Res));
            end case;
         end if;
         return Res;
      end Check_Input_Port;

      --  Checks the port is an output port.
      function Check_Output_Port return Iir
      is
         Res : Iir;
      begin
         Res := Check_Port;
         if Res /= Null_Iir then
            --  IEEE 1076.4 4.3.2.1.3
            --  An output port is a VHDL port of mode OUT, INOUT or BUFFER.
            case Get_Mode (Res) is
               when Iir_Out_Mode
                 | Iir_Inout_Mode
                 | Iir_Buffer_Mode =>
                  null;
               when others =>
                  Error_Vital
                    (+Gen_Decl, "%i must be an output port", (1 => +Res));
            end case;
         end if;
         return Res;
      end Check_Output_Port;

      --  Extract a suffix from the generic name.
      type Suffixes_Kind is
        (
         Suffix_Name,     --  [a-z]*
         Suffix_Num_Name,  --  [0-9]*
         Suffix_Edge,     --  posedge, negedge, 01, 10, 0z, z1, 1z, z0
         Suffix_Noedge,   --  noedge
         Suffix_Eon       --  End of name
        );

      function Get_Next_Suffix_Kind return Suffixes_Kind
      is
         Len : Natural;
         P : constant Natural := Gen_Name_Pos;
         C : Character;
      begin
         Len := 0;
         while Gen_Name_Pos <= Gen_Name_Length loop
            C := Name (Gen_Name_Pos);
            Gen_Name_Pos := Gen_Name_Pos + 1;
            exit when C = '_';
            Len := Len + 1;
         end loop;
         if Len = 0 then
            return Suffix_Eon;
         end if;

         case Name (P) is
            when '0' =>
               if Len = 2 and then (Name (P + 1) = '1' or Name (P + 1) = 'z')
               then
                  return Suffix_Edge;
               else
                  return Suffix_Num_Name;
               end if;
            when '1' =>
               if Len = 2 and then (Name (P + 1) = '0' or Name (P + 1) = 'z')
               then
                  return Suffix_Edge;
               else
                  return Suffix_Num_Name;
               end if;
            when '2' .. '9' =>
               return Suffix_Num_Name;
            when 'z' =>
               if Len = 2 and then (Name (P + 1) = '0' or Name (P + 1) = '1')
               then
                  return Suffix_Edge;
               else
                  return Suffix_Name;
               end if;
            when 'p' =>
               if Len = 7 and then Name (P .. P + 6) = "posedge" then
                  return Suffix_Edge;
               else
                  return Suffix_Name;
               end if;
            when 'n' =>
               if Len = 7 and then Name (P .. P + 6) = "negedge" then
                  return Suffix_Edge;
               elsif Len = 6 and then Name (P .. P + 5) = "noedge" then
                  return Suffix_Edge;
               else
                  return Suffix_Name;
               end if;
            when 'a' .. 'm'
              | 'o'
              | 'q' .. 'y' =>
               return Suffix_Name;
            when others =>
               raise Internal_Error;
         end case;
      end Get_Next_Suffix_Kind;

      --  <SDFSimpleConditionAndOrEdge> ::=
      --     <ConditionName>
      --   | <Edge>
      --   | <ConditionName>_<Edge>
      procedure Check_Simple_Condition_And_Or_Edge
      is
         First : Boolean := True;
      begin
         loop
            case Get_Next_Suffix_Kind is
               when Suffix_Eon =>
                  --  Simple condition is optional.
                  return;
               when Suffix_Edge =>
                  if Get_Next_Suffix_Kind /= Suffix_Eon then
                     Error_Vital_Name ("garbage after edge");
                  end if;
                  return;
               when Suffix_Num_Name =>
                  if First then
                     Error_Vital_Name ("condition is a simple name");
                  end if;
               when Suffix_Noedge =>
                  Error_Vital_Name
                    ("'noedge' not allowed in simple condition");
               when Suffix_Name =>
                  null;
            end case;
            First := False;
         end loop;
      end Check_Simple_Condition_And_Or_Edge;

      --  <SDFFullConditionAndOrEdge> ::=
      --    <ConditionNameEdge>[_<SDFSimpleConditionAndOrEdge>]
      --
      --  <ConditionNameEdge> ::=
      --      [<ConditionName>_]<Edge>
      --    | [<ConditionName>_]noedge
      procedure Check_Full_Condition_And_Or_Edge is
      begin
         case Get_Next_Suffix_Kind is
            when Suffix_Eon =>
               --  FullCondition is always optional.
               return;
            when Suffix_Edge
              | Suffix_Noedge =>
               Check_Simple_Condition_And_Or_Edge;