aboutsummaryrefslogtreecommitdiffstats
path: root/Projects/AVRISP-MKII/Lib
diff options
context:
space:
mode:
authorDean Camera <dean@fourwalledcubicle.com>2010-11-08 03:41:48 +0000
committerDean Camera <dean@fourwalledcubicle.com>2010-11-08 03:41:48 +0000
commit0ce2950d811b8dc11e46602e7490d795d8ddfb5d (patch)
tree3f070d28b9fe15ef998300769c256477669d5848 /Projects/AVRISP-MKII/Lib
parentbac860b173c938bda02be4d2b1e6c72d21380a38 (diff)
downloadlufa-0ce2950d811b8dc11e46602e7490d795d8ddfb5d.tar.gz
lufa-0ce2950d811b8dc11e46602e7490d795d8ddfb5d.tar.bz2
lufa-0ce2950d811b8dc11e46602e7490d795d8ddfb5d.zip
Added board hardware driver support for the Adafruit U4 breakout board.
Fixed calculation of timer register reload values derived from F_CPU; must subtract one from the division result for the compare value to be correct. Change AVRISP-MKII rescue clock speed to 4MHz to ensure that a 125KHz ISP speed works regardless of the target's fuses (i.e. DIV8 set).
Diffstat (limited to 'Projects/AVRISP-MKII/Lib')
-rw-r--r--Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c4
-rw-r--r--Projects/AVRISP-MKII/Lib/V2Protocol.c2
2 files changed, 3 insertions, 3 deletions
diff --git a/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c b/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
index fe2f50d07..f4e9e3d3a 100644
--- a/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
+++ b/Projects/AVRISP-MKII/Lib/ISP/ISPTarget.c
@@ -196,10 +196,10 @@ void ISPTarget_ConfigureRescueClock(void)
DDRB |= (1 << 5);
#endif
- /* Start Timer 1 to generate a .5MHz clock on the OCR1A pin */
+ /* Start Timer 1 to generate a 4MHz clock on the OCR1A pin */
TIMSK1 = 0;
TCNT1 = 0;
- OCR1A = (F_CPU / 2 / 500000UL);
+ OCR1A = ((F_CPU / 2 / 4000000UL) - 1);
TCCR1A = (1 << COM1A0);
TCCR1B = ((1 << WGM12) | (1 << CS10));
}
diff --git a/Projects/AVRISP-MKII/Lib/V2Protocol.c b/Projects/AVRISP-MKII/Lib/V2Protocol.c
index e2c658673..618dedb43 100644
--- a/Projects/AVRISP-MKII/Lib/V2Protocol.c
+++ b/Projects/AVRISP-MKII/Lib/V2Protocol.c
@@ -61,7 +61,7 @@ void V2Protocol_Init(void)
#endif
/* Timeout timer initialization (10ms period) */
- OCR0A = ((F_CPU / 1024) / 100);
+ OCR0A = (((F_CPU / 1024) / 100) - 1);
TCCR0A = (1 << WGM01);
TIMSK0 = (1 << OCIE0A);