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| author | inmarket <andrewh@inmarket.com.au> | 2015-02-07 22:25:00 +1000 |
|---|---|---|
| committer | inmarket <andrewh@inmarket.com.au> | 2015-02-07 22:25:00 +1000 |
| commit | 1760cd3aadb5d3a24479424b1e19570361f45abd (patch) | |
| tree | b56d335460d229b1bc23e04664191750ad887f7a /boards | |
| parent | 112852ffc3251390b44995690b156f6a942403e5 (diff) | |
| download | uGFX-1760cd3aadb5d3a24479424b1e19570361f45abd.tar.gz uGFX-1760cd3aadb5d3a24479424b1e19570361f45abd.tar.bz2 uGFX-1760cd3aadb5d3a24479424b1e19570361f45abd.zip | |
Oops - left some debugging.
Diffstat (limited to 'boards')
| -rw-r--r-- | boards/base/Olimex-SAM7EX256-GE8/board_TLS8204.h | 7 |
1 files changed, 3 insertions, 4 deletions
diff --git a/boards/base/Olimex-SAM7EX256-GE8/board_TLS8204.h b/boards/base/Olimex-SAM7EX256-GE8/board_TLS8204.h index 0ec832aa..137808da 100644 --- a/boards/base/Olimex-SAM7EX256-GE8/board_TLS8204.h +++ b/boards/base/Olimex-SAM7EX256-GE8/board_TLS8204.h @@ -33,7 +33,6 @@ #define PORT_DC UEXT_PORT_PIN6 #define PIN_DC UEXT_PORTPIN_PIN6 - #if PIO_METHOD == PIO_METHOD_AT91 #define PinIsOutput(port,pin) ((port)->PIO_OER = 1 << (pin), (port)->PIO_PER = 1 << (pin), (port)->PIO_MDDR = 1 << (pin), (port)->PIO_PPUDR = 1 << (pin)) #define PinSet(port,pin) (port)->PIO_SODR = 1 << (pin) @@ -58,9 +57,9 @@ PinSet(UEXT_SPI_MOSI_PORT, UEXT_SPI_MOSI_PORTPIN); else PinClear(UEXT_SPI_MOSI_PORT, UEXT_SPI_MOSI_PORTPIN); - spi_delay(1000); + spi_delay(1); PinClear(UEXT_SPI_SCK_PORT, UEXT_SPI_SCK_PORTPIN); - spi_delay(1000); + spi_delay(1); PinSet(UEXT_SPI_SCK_PORT, UEXT_SPI_SCK_PORTPIN); } } @@ -101,7 +100,7 @@ UEXT_SPI_PORT->PIO_PPUER = 1<<UEXT_SPI_MISO_PORTPIN; \ UEXT_SPI_PORT->PIO_PDR = (1<<UEXT_SPI_CS_PORTPIN) | (1<<UEXT_SPI_SCK_PORTPIN) | (1<<UEXT_SPI_MOSI_PORTPIN) | (1<<UEXT_SPI_MISO_PORTPIN); \ UEXT_SPI_PORT->UEXT_SPI_PERIPH = (1<<UEXT_SPI_CS_PORTPIN) | (1<<UEXT_SPI_SCK_PORTPIN) | (1<<UEXT_SPI_MOSI_PORTPIN) | (1<<UEXT_SPI_MISO_PORTPIN); \ - AT91C_BASE_PMC->PMC_PCER = 1 << UEXT_SPI_ID; \ + AT91C_BASE_PMC->PMC_PCER = 1 << UEXT_SPI_ID; \ UEXT_SPI_DEV->SPI_CR = 0x81; \ UEXT_SPI_DEV->SPI_CR = 0x81; \ UEXT_SPI_DEV->SPI_CR = 0x01; \ |