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| author | Alan Mishchenko <alanmi@berkeley.edu> | 2018-08-19 10:12:50 +0700 |
|---|---|---|
| committer | Alan Mishchenko <alanmi@berkeley.edu> | 2018-08-19 10:12:50 +0700 |
| commit | 04dfe7cdee109750fb70525fdd3fc39949530c43 (patch) | |
| tree | f740a25269c4e2341fa034316e739ad0120304f9 /src/base/acb/acbFunc.c | |
| parent | 3fb3c6bdd2035842eb4399100ae3fe6b2d6eb107 (diff) | |
| download | abc-04dfe7cdee109750fb70525fdd3fc39949530c43.tar.gz abc-04dfe7cdee109750fb70525fdd3fc39949530c43.tar.bz2 abc-04dfe7cdee109750fb70525fdd3fc39949530c43.zip | |
Complication problem fix.
Diffstat (limited to 'src/base/acb/acbFunc.c')
| -rw-r--r-- | src/base/acb/acbFunc.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/base/acb/acbFunc.c b/src/base/acb/acbFunc.c index d73d1d59..1efb5807 100644 --- a/src/base/acb/acbFunc.c +++ b/src/base/acb/acbFunc.c @@ -198,7 +198,7 @@ int Acb_WireIsTarget( int Token, Abc_Nam_t * pNames ) } void * Acb_VerilogSimpleParse( Vec_Int_t * vBuffer, Abc_Nam_t * pNames ) { - void * pDesign = NULL; + Ndr_Data_t * pDesign = NULL; Vec_Int_t * vInputs = Vec_IntAlloc(100); Vec_Int_t * vOutputs = Vec_IntAlloc(100); Vec_Int_t * vWires = Vec_IntAlloc(100); |