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authorAlan Mishchenko <alanmi@berkeley.edu>2020-05-03 12:07:52 -0700
committerAlan Mishchenko <alanmi@berkeley.edu>2020-05-03 12:07:52 -0700
commit3e150dd5532205d6b13aa28fdc526f5e8c0e72a1 (patch)
treeb9936748dda5e32f286b4129f8c59216e95d9086 /src/map
parentd51f798956a9f9fbdd1fc4eeecc483e511b1c3d3 (diff)
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Adding dumping of genlib library in Verilog.
Diffstat (limited to 'src/map')
-rw-r--r--src/map/mio/exp.h30
-rw-r--r--src/map/mio/mio.c22
-rw-r--r--src/map/mio/mio.h1
-rw-r--r--src/map/mio/mioUtils.c64
4 files changed, 110 insertions, 7 deletions
diff --git a/src/map/mio/exp.h b/src/map/mio/exp.h
index 962e218a..828d81c9 100644
--- a/src/map/mio/exp.h
+++ b/src/map/mio/exp.h
@@ -121,6 +121,36 @@ static inline void Exp_Print( int nVars, Vec_Int_t * p )
Exp_PrintLit( nVars, Vec_IntEntryLast(p) );
Abc_Print( 1, "\n" );
}
+static inline void Exp_PrintNodeVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Node, int fCompl )
+{
+ extern void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit );
+ if ( Vec_IntEntry(p, 2*Node+1) >= 2*nVars )
+ fprintf( pFile, "(" );
+ Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntry(p, 2*Node+1) ^ fCompl );
+ if ( Vec_IntEntry(p, 2*Node+1) >= 2*nVars )
+ fprintf( pFile, ")" );
+ fprintf( pFile, " %c ", fCompl ? '|' : '&' );
+ if ( Vec_IntEntry(p, 2*Node+0) >= 2*nVars )
+ fprintf( pFile, "(" );
+ Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntry(p, 2*Node+0) ^ fCompl );
+ if ( Vec_IntEntry(p, 2*Node+0) >= 2*nVars )
+ fprintf( pFile, ")" );
+}
+static inline void Exp_PrintLitVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames, int Lit )
+{
+ if ( Lit == EXP_CONST0 )
+ fprintf( pFile, "1\'b0" );
+ else if ( Lit == EXP_CONST1 )
+ fprintf( pFile, "1\'b1" );
+ else if ( Lit < 2 * nVars )
+ fprintf( pFile, "%s%s", (Lit&1) ? "~" : "", (char *)Vec_PtrEntry(vNames, Lit/2) );
+ else
+ Exp_PrintNodeVerilog( pFile, nVars, p, vNames, Lit/2-nVars, Lit&1 );
+}
+static inline void Exp_PrintVerilog( FILE * pFile, int nVars, Vec_Int_t * p, Vec_Ptr_t * vNames )
+{
+ Exp_PrintLitVerilog( pFile, nVars, p, vNames, Vec_IntEntryLast(p) );
+}
static inline Vec_Int_t * Exp_Reverse( Vec_Int_t * p )
{
Vec_IntReverseOrder( p );
diff --git a/src/map/mio/mio.c b/src/map/mio/mio.c
index 8648a604..3010bbd3 100644
--- a/src/map/mio/mio.c
+++ b/src/map/mio/mio.c
@@ -408,6 +408,7 @@ int Mio_CommandWriteGenlib( Abc_Frame_t * pAbc, int argc, char **argv )
FILE * pOut, * pErr, * pFile;
char * pFileName;
int fSelected = 0;
+ int fVerilog = 0;
int fVerbose = 0;
int c;
@@ -415,16 +416,19 @@ int Mio_CommandWriteGenlib( Abc_Frame_t * pAbc, int argc, char **argv )
pErr = Abc_FrameReadErr(pAbc);
Extra_UtilGetoptReset();
- while ( (c = Extra_UtilGetopt(argc, argv, "vah")) != EOF )
+ while ( (c = Extra_UtilGetopt(argc, argv, "agvh")) != EOF )
{
switch (c)
{
- case 'v':
- fVerbose ^= 1;
- break;
case 'a':
fSelected ^= 1;
break;
+ case 'g':
+ fVerilog ^= 1;
+ break;
+ case 'v':
+ fVerbose ^= 1;
+ break;
case 'h':
goto usage;
break;
@@ -450,16 +454,20 @@ int Mio_CommandWriteGenlib( Abc_Frame_t * pAbc, int argc, char **argv )
printf( "Error! Cannot open file \"%s\" for writing the library.\n", pFileName );
return 1;
}
- Mio_WriteLibrary( pFile, (Mio_Library_t *)Abc_FrameReadLibGen(), 0, 0, fSelected );
+ if ( fVerilog )
+ Mio_WriteLibraryVerilog( pFile, (Mio_Library_t *)Abc_FrameReadLibGen(), 0, 0, fSelected );
+ else
+ Mio_WriteLibrary( pFile, (Mio_Library_t *)Abc_FrameReadLibGen(), 0, 0, fSelected );
fclose( pFile );
printf( "The current genlib library is written into file \"%s\".\n", pFileName );
return 0;
usage:
- fprintf( pErr, "\nusage: write_genlib [-vah] <file>\n");
+ fprintf( pErr, "\nusage: write_genlib [-agvh] <file>\n");
fprintf( pErr, "\t writes the current genlib library into a file\n" );
- fprintf( pErr, "\t-v : toggles enabling of verbose output [default = %s]\n", fVerbose? "yes" : "no" );
fprintf( pErr, "\t-a : toggles writing min-area gates [default = %s]\n", fSelected? "yes" : "no" );
+ fprintf( pErr, "\t-g : toggles writing the library in Verilog [default = %s]\n", fVerilog? "yes" : "no" );
+ fprintf( pErr, "\t-v : toggles enabling of verbose output [default = %s]\n", fVerbose? "yes" : "no" );
fprintf( pErr, "\t-h : print the command usage\n");
fprintf( pErr, "\t<file> : optional file name to write the library\n");
return 1;
diff --git a/src/map/mio/mio.h b/src/map/mio/mio.h
index d7f52f8c..18e3b92b 100644
--- a/src/map/mio/mio.h
+++ b/src/map/mio/mio.h
@@ -194,6 +194,7 @@ extern void Mio_GateDelete( Mio_Gate_t * pGate );
extern void Mio_PinDelete( Mio_Pin_t * pPin );
extern Mio_Pin_t * Mio_PinDup( Mio_Pin_t * pPin );
extern void Mio_WriteLibrary( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int fShort, int fSelected );
+extern void Mio_WriteLibraryVerilog( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int fShort, int fSelected );
extern Mio_Gate_t ** Mio_CollectRoots( Mio_Library_t * pLib, int nInputs, float tDelay, int fSkipInv, int * pnGates, int fVerbose );
extern Mio_Cell_t * Mio_CollectRootsNew( Mio_Library_t * pLib, int nInputs, int * pnGates, int fVerbose );
extern Mio_Cell_t * Mio_CollectRootsNewDefault( int nInputs, int * pnGates, int fVerbose );
diff --git a/src/map/mio/mioUtils.c b/src/map/mio/mioUtils.c
index 9cd44cba..2adb2bd0 100644
--- a/src/map/mio/mioUtils.c
+++ b/src/map/mio/mioUtils.c
@@ -288,6 +288,70 @@ void Mio_WriteLibrary( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int f
/**Function*************************************************************
+ Synopsis []
+
+ Description []
+
+ SideEffects []
+
+ SeeAlso []
+
+***********************************************************************/
+void Mio_WriteGateVerilog( FILE * pFile, Mio_Gate_t * pGate, Vec_Ptr_t * vNames )
+{
+ char * pName; int i;
+ fprintf( pFile, "module %s ( ", pGate->pName );
+ fprintf( pFile, "%s", pGate->pOutName );
+ Vec_PtrForEachEntry( char *, vNames, pName, i )
+ fprintf( pFile, ", %s", pName );
+ fprintf( pFile, " );\n" );
+ fprintf( pFile, " output %s;\n", pGate->pOutName );
+ if ( Vec_PtrSize(vNames) > 0 )
+ {
+ fprintf( pFile, " input %s", (char *)Vec_PtrEntry(vNames, 0) );
+ Vec_PtrForEachEntryStart( char *, vNames, pName, i, 1 )
+ fprintf( pFile, ", %s", pName );
+ fprintf( pFile, ";\n" );
+ }
+ fprintf( pFile, " assign %s = ", pGate->pOutName );
+ Exp_PrintVerilog( pFile, Vec_PtrSize(vNames), pGate->vExpr, vNames );
+ fprintf( pFile, ";\n" );
+ fprintf( pFile, "endmodule\n\n" );
+}
+void Mio_WriteLibraryVerilog( FILE * pFile, Mio_Library_t * pLib, int fPrintSops, int fShort, int fSelected )
+{
+ Mio_Gate_t * pGate;
+ Mio_Pin_t * pPin;
+ Vec_Ptr_t * vGates = Vec_PtrAlloc( 1000 );
+ Vec_Ptr_t * vNames = Vec_PtrAlloc( 100 );
+ int i, nCells;
+ int fAllPins = fShort || Mio_CheckGates( pLib );
+ if ( fSelected )
+ {
+ Mio_Cell2_t * pCells = Mio_CollectRootsNewDefault2( 6, &nCells, 0 );
+ for ( i = 0; i < nCells; i++ )
+ Vec_PtrPush( vGates, pCells[i].pMioGate );
+ ABC_FREE( pCells );
+ }
+ else
+ {
+ for ( i = 0; i < pLib->nGates; i++ )
+ Vec_PtrPush( vGates, pLib->ppGates0[i] );
+ }
+ fprintf( pFile, "// Verilog for genlib library \"%s\" with %d gates written by ABC on %s\n\n", pLib->pName, Vec_PtrSize(vGates), Extra_TimeStamp() );
+ Vec_PtrForEachEntry( Mio_Gate_t *, vGates, pGate, i )
+ {
+ Vec_PtrClear( vNames );
+ Mio_GateForEachPin( pGate, pPin )
+ Vec_PtrPush( vNames, pPin->pName );
+ Mio_WriteGateVerilog( pFile, pGate, vNames );
+ }
+ Vec_PtrFree( vNames );
+ Vec_PtrFree( vGates );
+}
+
+/**Function*************************************************************
+
Synopsis [Compares the max delay of two gates.]
Description []